ia64 scheduling

[Bernd Schmidt]

On Thu, 28 Dec 2000, Daniel Berlin wrote:

> Which would help IA64/other platforms more, better scheduling, or a new
> register allocator?

Depends.  As far as ia64 is concerned, I doubt you'd notice a different
register allocator, spills really don't happen very often from what I've
seen.  Other targets, such as i386, are a different story.

> However, on x86, Iterated Register Coalescing is going to be a lose,
> because you'll spill *way* too much, unless you somehow take into account
> the fact that hardware register renaming is going on.
> The SML/NJ guys ran into this, and I have a paper on Optimal Spilling for
> CISC processors, that would be useful for this.

I have a few reload patches that, once completed, will make us generate
better code for targets such as i386 and sh.  I'd like to get those into
gcc-3.1.  Mail me if you're interested, they are too big for the list.


Bernd