RFC: Prefetch instruction support

[Michael Meissner]

On Tue, Apr 11, 2000 at 04:43:06PM +0200, Jan Hubicka wrote:
> 
> Hi
> During last weekend I've implemented basic prefetch instruction framework
> (tested on Athlon) based on the suggestions of Alex Dreyzen and Norbert Juffa
> from AMD.
> 
> Basically it examines loops for arrays traversed and generate prefetches few
> cache lines forward. Also it is able to suggest unroll_number for loop unroller
> to fetch one cache line per loop iteration (in order to avoid
> prefetching of single page multiple times).  This results in massive loop
> unrolling (up to 64 times on Athlon), but seems to do good job.  Later we may
> want to tweak this heruistics.
> 
> Here are few implementation details:
> 
> The prefetch instruction is represented as:
> 
> (insn 92 28 30 (unspec_volatile[ 
>             (plus:SI (plus:SI (mult:SI (reg/v:SI 26)
>                         (const_int 4 [0x4]))
>                     (reg:SI 29))
>                 (const_int 128 [0x80]))
>         ]  1) -1 (nil)
>     (nil))

I would prefer new RTL codes to represent the prefetch:

(insn 92 28 30 (prefetch (mem:SI (plus:SI (plus:SI (mult:SI (reg/v:SI 26)
							    (const_int 4))
						   (reg:SI 29))
					  (const_int 128)))))

-- 
Michael Meissner, Cygnus Solutions, a Red Hat company.
PMB 198, 174 Littleton Road #3, Westford, Massachusetts 01886, USA
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