RFC: Prefetch instruction support

[David Edelsohn]

>>>>> Brad Lucier writes:

Brad> Altivec on PowerPC G4 also has prefetch instructions that may be useful
Brad> for regular code, even if you don't generate vector Altivec instructions.

	I am not sure what you mean by an Altivec-specific instruction.
The PowerPC Architecture has data cache block touch (dcbt) and data cache
block touch for store (dcbtst) instructions which take an indexed form
address and may pre-load the cache line.

David