Fwd: Questions on PA machine description?

[Jeffrey A Law]

  In message < 36F96A7D.F0DBDF47@americasm01.nt.com >you write:
  > So the ready list for a cycle starts out with insns with no
  > dependencies.
Right.  The only insns on the ready list should have had all their dependencies
resolved already.

  > Then when we pick an insn off the ready list, it's placed
  > into the scheduled chain and schedule_insn is called.
Yes.


  > OK, now I'm confused, because in my head it looks like the code should
  > already do what you want.
Hmmm, you're right.  Hmmm, now I'm not sure why I saw the undesired behavior.

  > If the alu has 0 delay, insn_cost would return 0?  Then, INSN_TICK would
  > be unchanged.  And effective_cost would end up 0, causing the dependent
  > insn to be placed into ready.
Maybe that was the problem -- maybe I had a ready delay of 1 cycle or
something like that.

I agree the code should do what we want.  Maybe we need to tweak the ready
delay to be zero for the cases where we want to issue a dependent insn in the
same cycle.

Anyway, here's the testcase.  Look at the .sched dump and you'll see that
the two insns which compute the address of the global variable are issued
in different cycles.

It doesn't make a difference in this example, but does in some more complex
code I looked at for the PA8000.

int a;

int *
blah ()
{
return &a;
}

;;   ==================== scheduling visualization for block 0
;;   clock     pa8000alu                          pa8000alu                          no-unit
;;   =====     ==============================     ============================
;;   1         7    r95=high(`a')                 ----------------------------
;;   2         8    %r28=r95+low(`a')             ----------------------------
;;   3         ------------------------------     ----------------------------