K6-Optimierungen im EGCS

Kurt Garloff garloff@hft.e-technik.uni-dortmund.de
Mon Sep 21 09:44:00 GMT 1998


Hi Jens-Uwe, hi Scott, hi egcs-people,

I append my latest AMD-K6 patches. Sorry for the delay. I was doing some
experiments with John Carr's K6 patches, and the results were quite
encouraging, but from time to time I got (reproducable) internal compiler
errors. I was able to fix one (caused by usage of cmove on K6), but not
another one. So I dropped working on this. Thanks why it took me some time.

So here is basically an updated version of the patch posted earlier. Some
more fine tuning done.

On Thu, Sep 17, 1998 at 05:16:05PM +0200, Jens-Uwe Rumstich wrote:
> Hi!
> 
> Gibt es eigentlich irgendwo eine leicht verstaendliche Einfuehrung
> in die i386.h/md/c-files? In den .Inf-files steht zwar einiges drinne,

Look into gcc/rtl.def for a description.
 
> Wo gibt man dem Compiler die Informationen fuer Instruction scheduling
> usw? 

cost in i386.c and the defs in i386.md

> Ansonsten, ich habe frueher recht viel in Assembler programmiert und
> optimiert, weiss also, was die CPUs moegen ;)  Weiterhin kenne ich
> dieses K6-2-Optimierungshandbuch.

Maybe you can write some simple test programs and look at the produced asm
code, if you want to take the effort.

If you want to handcode things, I got two more hints for you.
* If you have a K6-2, use the prefetch insn. It is perfectly mixable with
  FPU insns and can speed up things quite a lot. (I got 40% speedup for a
  matrix vector multiply with doubles!)
* Make sure to have your insns not cross cache line boundaries by inserting
  nop at the right places.

Also note that K6 is sometimes different from other CPUs. E.g. you are
certainly used to use "xorl %eax,%eax" to clear the eax register. K6 prefers
"movl 0,%eax", though. But the K6 optim. manual is your friend.

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|  cand.phys. Kurt Garloff        C1-O4-101 (Chemiegeb"aude)   |
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