Reimplementing pgcc's -frisc

[Bernd Schmidt]

The pentium GCC compiler has a switch "-frisc" that enables a new pass which
splits loads and stores out of more instructions.  Example:

addl $4,16(esp)   -->   movl 16(esp),eax
			addl $4,eax
			movl eax,16(esp)

This transformation, when combined with instruction scheduling, can improve
performance on the Pentium, because each of the new instructions is pairable
with other simple instructions.

I have thought of a way to implement this properly (the pgcc implemention is
rather complicated), and I'd like to describe it here so people can stop me
if the idea isn't so hot.

First of all, the transformation should not be done before reload, since it
requires additional registers, and increasing register pressure is likely
to lose all the benefits we gain from the transformation.

The actual splitting can be done in sched2 via a define_split.  The only
problem that remains is to allocate a scratch register _after_ reload has
run.  I suggest adding a small hard register life analysis pass (I've posted
an early version of such a pass last Friday to egcs-patches), which is useful
for a variety of reasons, not just for implementing -frisc.  This pass
enables us to determine which registers are live at any point.  Then, we
could add code that looks for a special kind of match_scratch, which has
a constraint that reads "=X#*r".  That means that it's written to, and no
register is required.  The 'r' constraint is hidden behind the string "#*"
which tells all passes before to ignore it.  If such a constraint is found,
and a register of the right class is available, substitute it for the scratch
(and make a proper REG_UNUSED note).

One thing to watch out for is that some passes expect that simple things
like an integer addition are done with a single set, not a parallel.  So this
may initially lead to some optimizations not performing as well as they could
if such clobbers are added to instruction patterns.

Comments?

Bernd