SMALL_REGISTER_CLASSES
amylaar@cygnus.co.uk
amylaar@cygnus.co.uk
Tue Jan 20 02:21:00 GMT 1998
> Looking through the GCC code I get the impression that
> SMALL_REGISTER_CLASSES has been used to infer that a target has only a
> few registers, rather than its original meaning, where it signified
> that registers explicity mentioned in the RTL had to be used as spill
> registers.
>
> With SMALL_REGISTER_CLASSES set, the combiner won't combine insn 4 with
> insn 12. Is there a good reason for this?
Yes. (reg:QI 10 ar2) is a hard register (at least as far as the compiler
is concerned). If insn 4 was combined into insn 12, the life of ar2
would be lengthened, thus creating possible conflicts with reloads for
insn 6 that use that register.
If such reloads can actually be created is immaterial; what counts is
that the combiner knows - or doesn't know - that no such reloads are
possible.
SMALL_REGISTER_CLASSES gives reload the license to use registers that
are explicitly mentioned in the rtl.
>
>
> (insn 4 2 6 (set (reg/v:QI 36)
> (reg:QI 10 ar2)) 5 {movqi_noclobber} (nil)
> (expr_list:REG_DEAD (reg:QI 10 ar2)
> (nil)))
>
> (insn 6 4 7 (set (reg/v:QI 37)
> (reg:QI 2 r2)) 5 {movqi_noclobber} (nil)
> (expr_list:REG_DEAD (reg:QI 2 r2)
> (nil)))
>
> (insn 12 10 14 (set (reg:QI 39)
> (mem/s:QI (plus:QI (reg/v:QI 36)
> (const_int 5)))) 5 {movqi_noclobber} (insn_list 4 (nil))
> (expr_list:REG_DEAD (reg/v:QI 36)
> (nil)))
More information about the Gcc
mailing list