Problem in global register allocation

[Jeffrey A Law]

  In message < vyzg1qoo4d1.fsf@issan.informatik.uni-dortmund.de >you write:
  > |> Try changing the mode of operand 2 to HImode.
  > 
  > Why?  The size of the shift count has nothing to do with the size of the
  > shifted value.  For example, on the m68k the shift count is truncated to 5
  > bits by the cpu.  It doesn't make sense to require anything wider.
No reason other than I've personally had problems mixing modes
like that.

  > Actually, making the shift count wider may pessimize the code, in case it
  > has to be widened to match the constraint.  Of course, this is pretty
  > unlikely, but truncating a value comes for free on most, if not all cpus.
True.  The difference is I'm speaking from actual experience -- I've
actually seen mixing modes in the manner Christian is doing pessimize
code.

jeff