sparc64 support for Solaris

[John Carr]

>     Sun describes my machine (Ultra 1 Model 170) as having a 64 bit,
>     v9 instruction set CPU. 

True.

> It sounds like (based on the last few mailings on this topic) Sol2.5.x
> doesn't support 64 bit context switches.

Basically true, but you can lose the high bits of inactive register
windows and the "in" registers without a context switch.  A register
window overflow is enough because the stack frame only reserves 32
bits per register to save them.

> Now, I noticed that "v9" and "sparc64" must both be true (you can't
> have one without the other).

v9 = the extra instructions added in V9.

sparc64 = use 64 bit registers instead of 32; since SPARC V8 doesn't
define 64 bit registers this implies V9.

The latter is not supported on Solaris 2.5 or 2.6.  Even if you wrote
all new 64 bit libraries the kernel register window save code doesn't
support 64 bit user mode stacks.  (The support is actually there in
the kernel for use in kernel mode but there is no way for a user mode
process to set the bits which mean "I might use 64 bit mode".)

>     >> "v9" is used to specify a true 64 bit architecture.

No.  It selects the V9 instruction set but does not enable use of 64
bit registers.  There are many minor ways in which 32-bit V9 is
different from V8.  For example, the effects of a "wr" instruction may
not be visible for 3 instructions in SPARC V8 but are visibile
immediately in SPARC V9.

>     >> "v8plus" is what Sun calls Solaris2 running on UltraSPARC's.
> 
>     But then what does -mcpu=ultrasparc mean?   Is there a difference
>     between this and -mcpu=v8plus?

I don't think v8plus is a useful option in egcs yet, but I have
changes which make v8plus mode take advantage of some 64 bit
instructions operating on global and out registers (which are not
randomly clobbered).