base + index register addressing
Michael P. Hayes
michaelh@ongaonga.chch.cri.nz
Fri Oct 17 20:51:00 GMT 1997
Jeffrey A Law writes:
> > I was going to comment that the patch might be even better, if it
> > dealt with register + scaled register that some machines have (such
> > as the x86, ns32k, 88k to name the ones I've dealt with).
> It's worth noting that patch only helps when the base/index is a hard reg,
> which limits its usefulness on most of our platforms. It's unclear if
> the benefit for handling scaled register would outweigh the work involved.
Most of the utility of the patch occurs when an incoming function
argument is in a hard base (or possibly index) register.
IMO, things would be simpler if two register addresses were
canonicalized so that the base register preceeded the index register,
i.e., (mem (plus (base_reg) (index_reg)). This would reduce the
ambiguity when it comes to allocating base and index registers.
mph...
More information about the Gcc
mailing list