alpha haifa regression

[Joern Rennecke]

>   > But for ports where the arguments are set up with __builtin_saveregs -
>   > expanded from va_start - this would require two blockage insns - one
>   > in front and one at the end - which could end up in an advanced position
>   > in the function too.
> No.  You only need once since the prologue itself won't load/store in
> the same area as the varargs flushback.  And if there is some el-bizzaro
> target that does, then emit two blockages.  No big deal.

For __builtin_saveregs, we are talking about a stack slot, not a
designated varargs flushback area.
And in front of va_start, any C code might be placed.  Hence, we may not
make any assumptions that only the prologue is in front.