diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
index 95bba25..3138b5f 100644
--- a/gcc/config/i386/i386-expand.c
+++ b/gcc/config/i386/i386-expand.c
@@ -6470,12 +6470,12 @@ ix86_expand_v1ti_ashiftrt (rtx operands[])
   if (bits == 96)
     {
       /* Three operations.  */
-      rtx tmp3 = gen_reg_rtx (V2DImode);
       rtx tmp1 = gen_reg_rtx (V4SImode);
       rtx tmp2 = gen_reg_rtx (V4SImode);
       emit_move_insn (tmp1, gen_lowpart (V4SImode, op1));
       emit_insn (gen_ashrv4si3 (tmp2, tmp1, GEN_INT (31)));
 
+      rtx tmp3 = gen_reg_rtx (V2DImode);
       rtx tmp4 = gen_reg_rtx (V2DImode);
       rtx tmp5 = gen_reg_rtx (V2DImode);
       emit_move_insn (tmp3, gen_lowpart (V2DImode, tmp1));
@@ -6493,6 +6493,30 @@ ix86_expand_v1ti_ashiftrt (rtx operands[])
       return;
     }
 
+  if (bits >= 111)
+    {
+      /* Three operations.  */
+      rtx tmp1 = gen_reg_rtx (V4SImode);
+      rtx tmp2 = gen_reg_rtx (V4SImode);
+      emit_move_insn (tmp1, gen_lowpart (V4SImode, op1));
+      emit_insn (gen_ashrv4si3 (tmp2, tmp1, GEN_INT (bits - 96)));
+
+      rtx tmp3 = gen_reg_rtx (V8HImode);
+      rtx tmp4 = gen_reg_rtx (V8HImode);
+      emit_move_insn (tmp3, gen_lowpart (V8HImode, tmp2));
+      emit_insn (gen_sse2_pshufhw (tmp4, tmp3, GEN_INT (0xfe)));
+
+      rtx tmp5 = gen_reg_rtx (V4SImode);
+      rtx tmp6 = gen_reg_rtx (V4SImode);
+      emit_move_insn (tmp5, gen_lowpart (V4SImode, tmp4));
+      emit_insn (gen_sse2_pshufd (tmp6, tmp5, GEN_INT (0xfe)));
+
+      rtx tmp7 = gen_reg_rtx (V1TImode);
+      emit_move_insn (tmp7, gen_lowpart (V1TImode, tmp6));
+      emit_move_insn (operands[0], tmp7);
+      return;
+    }
+
   if (TARGET_AVX2 || TARGET_SSE4_1)
     {
       /* Three operations.  */