[PATCH] RISC-V: Handle overlap in expand_vec_perm PR121724.

[Jeff Law]

On 9/1/25 4:26 AM, Robin Dapp wrote:
> Hi,
> 
> In a two-source gather we unconditionally overwrite target with the
> first gather already.  If op1 == target this clobbers the source operand
> for the second gather.  This patch uses a temporary in that case.
> 
> Regtested on rv64gcv_zvl512b.
> 
> Regards
> Robin
> 
>      PR target/121724
> 
> gcc/ChangeLog:
> 
>      * config/riscv/riscv-v.cc (expand_vec_perm): Use temporary if
>      op1 and target overlap.
> 
> gcc/testsuite/ChangeLog:
> 
>      * gcc.target/riscv/rvv/autovec/pr121724.c: New test.
OK.  Though I think you've got the wrong PR.  121724 is a C++ 
rejects-valid bug :-)


> ---
> gcc/config/riscv/riscv-v.cc                   | 11 +++++--
> .../gcc.target/riscv/rvv/autovec/pr121724.c   | 30 +++++++++++++++++++
> 2 files changed, 38 insertions(+), 3 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121724.c
> 
> diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
> index daa1b37bfe5..eb9afffe2ac 100644
> --- a/gcc/config/riscv/riscv-v.cc
> +++ b/gcc/config/riscv/riscv-v.cc
> @@ -3323,15 +3323,17 @@ expand_vec_perm (rtx target, rtx op0, rtx op1, 
> rtx sel)
>    mask_mode = get_mask_mode (data_mode);
>    rtx mask = gen_reg_rtx (mask_mode);
>    rtx max_sel = gen_const_vector_dup (sel_mode, nunits);
> +  bool overlap = target == op1;
> +  rtx tmp_target = overlap ? gen_reg_rtx (data_mode) : target;
Consider reg_overlap_mentioned_p.   It may not really matter in practice 
here, hence the "consider" :-)

jeff