[pushed][PATCH] LoongArch: Fix selector error in lasx_xvexth_h/w/d* patterns

[Lulu Cheng]

Pushed to r15-6488.

在 2024/12/30 上午10:37, Guo Jie 写道:
> The xvexth related instructions operate SEPARATELY according to
> the high and low 128 bits, and sign/zero extend the upper half
> of every 128 bits in src to the corresponding 128 bits in dest.
>
> For xvexth.d.w, the rule for the first element of dest should be:
>      dest.D[0] = sign_extend (src.W[2] ,64);
> instead of:
>      dest.D[0] = sign_extend (src.W[4] ,64);
>
> gcc/ChangeLog:
>
> 	* config/loongarch/lasx.md: Fix selector index.
>
> ---
>   gcc/config/loongarch/lasx.md | 14 +++++++-------
>   1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md
> index 071a5cb1733..7d3c035eef4 100644
> --- a/gcc/config/loongarch/lasx.md
> +++ b/gcc/config/loongarch/lasx.md
> @@ -4249,10 +4249,10 @@ (define_insn "lasx_xvexth_h<u>_b<u>"
>   	(any_extend:V16HI
>   	  (vec_select:V16QI
>   	    (match_operand:V32QI 1 "register_operand" "f")
> -	      (parallel [(const_int 16) (const_int 17)
> -			 (const_int 18) (const_int 19)
> -			 (const_int 20) (const_int 21)
> -			 (const_int 22) (const_int 23)
> +	      (parallel [(const_int 8) (const_int 9)
> +			 (const_int 10) (const_int 11)
> +			 (const_int 12) (const_int 13)
> +			 (const_int 14) (const_int 15)
>   			 (const_int 24) (const_int 25)
>   			 (const_int 26) (const_int 27)
>   			 (const_int 28) (const_int 29)
> @@ -4267,8 +4267,8 @@ (define_insn "lasx_xvexth_w<u>_h<u>"
>   	(any_extend:V8SI
>   	  (vec_select:V8HI
>   	    (match_operand:V16HI 1 "register_operand" "f")
> -	    (parallel [(const_int 8) (const_int 9)
> -		       (const_int 10) (const_int 11)
> +	    (parallel [(const_int 4) (const_int 5)
> +		       (const_int 6) (const_int 7)
>   		       (const_int 12) (const_int 13)
>   		       (const_int 14) (const_int 15)]))))]
>     "ISA_HAS_LASX"
> @@ -4281,7 +4281,7 @@ (define_insn "lasx_xvexth_d<u>_w<u>"
>   	(any_extend:V4DI
>   	  (vec_select:V4SI
>   	    (match_operand:V8SI 1 "register_operand" "f")
> -	    (parallel [(const_int 4) (const_int 5)
> +	    (parallel [(const_int 2) (const_int 3)
>   		       (const_int 6) (const_int 7)]))))]
>     "ISA_HAS_LASX"
>     "xvexth.d<u>.w<u>\t%u0,%u1"