[PATCH v2 0/4] aarch64, vect: Extend simdclone support to vector-length agnostic SVE

Victor Do Nascimento victor.donascimento@arm.com
Tue Nov 5 00:05:44 GMT 2024


Following a few bugfixes in the if-convert pass which were previously
found to degrade performance in the proposed SVE libmvec
autovectorization of conditional calls to math functions, this
patch-series carries on the work initially presented by Andre Vieira
and last discussed at:

 - https://patchwork.sourceware.org/project/gcc/list/?series=30364

This version addresses the comments found in the last review cycle.

Changes:
========
[PATCH 1/4]:
* s/machine_mode ARG_UNUSED (vector_mode))/machine_mode)/
in `ix86_simd_clone_usable'.  As per acceptable C++ usage, just omit
the parameter name. This same substitution could potentially be
applied in `gcn_simd_clone_usable', but given present convention w/i
the file and function, where the C ARG_UNUSED is still used in the
first parameter, we've chosen to align ourselves with the present
style.
* Regarding the discussion about simdclones without a return value and
the mapping of `vinfo->vector_mode' in such cases, we find that we can
reliably rely on vector_mode to be that of the return value, given
that autovectorization requires both `simd' and `const' to be passed
to `__attribute__' and it does not make sense for a `const' function
to return void.
[PATCH 2/4]:
* No change applied, previous approval granted.
[PATCH 3/4]:
* Minor changes as requested in the last round of reviews. We found
that the use of `push_cfun' + `pop_cfun' to be unsuitable for the
present use-case and so that approach was not pursued further. We
factored out changes to `gomp/declare-variant-14.{c,f90}' into a
separate patch, as these are effectively target-specific tests for
i?86 and x86_64 and should therefore be reviewed as such.
[PATCH 4/4]:
New. Changes taken from patch 3/4.

Regression tested on aarch64-none-linux-gnu, arm-none-linux-gnueabihf
and x86_64-linux-gnu, no new regressions.

Andre Simoes Dias Vieira (4):
  vect: Pass stmt_vec_info to TARGET_SIMD_CLONE_USABLE
  vect: disable multiple calls of poly simdclones
  aarch64: Add SVE support for simd clones [PR 96342]
  vect: Disable `omp declare variant' tests for aarch64

 gcc/config/aarch64/aarch64-protos.h           |   2 +
 gcc/config/aarch64/aarch64-sve-builtins.cc    |   6 +-
 gcc/config/aarch64/aarch64.cc                 | 185 +++++++++++++++---
 gcc/config/gcn/gcn.cc                         |   3 +-
 gcc/config/i386/i386.cc                       |   3 +-
 gcc/doc/tm.texi                               |   8 +-
 gcc/omp-simd-clone.cc                         |  13 +-
 gcc/target.def                                |   8 +-
 .../c-c++-common/gomp/declare-variant-14.c    |  12 +-
 .../gcc.target/aarch64/declare-simd-2.c       |   1 +
 .../gcc.target/aarch64/vect-simd-clone-1.c    | 137 +++++++++++++
 .../gfortran.dg/gomp/declare-variant-14.f90   |  10 +-
 gcc/tree-vect-stmts.cc                        |  14 +-
 13 files changed, 341 insertions(+), 61 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/vect-simd-clone-1.c

-- 
2.34.1



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