[PATCH] recog: Handle some mode-changing hardreg propagations

[Jeff Law]

On 7/10/24 9:32 AM, Richard Sandiford wrote:
> insn_propagation would previously only replace (reg:M H) with X
> for some hard register H if the uses of H were also in mode M.
> This patch extends it to handle simple mode punning too.
> 
> The original motivation was to try to get rid of the execution
> frequency test in aarch64_split_simd_shift_p, but doing that is
> follow-up work.
> 
> I tried this on at least one target per CPU directory (as for
> the late-combine patches) and it seems to be a small win for
> all of them.
> 
> The patch includes a couple of updates to the ia32 results.
> In pr105033.c, foo3 replaced:
> 
>         vmovq       8(%esp), %xmm1
>         vpunpcklqdq %xmm1, %xmm0, %xmm0
> 
> with:
> 
>         vmovhps     8(%esp), %xmm0, %xmm0
> 
> In vect-bfloat16-2b.c, 5 of the vec_extract_v32bf_* routines
> (specifically the ones with nonzero even indices) replaced
> things like:
> 
>         movl    28(%esp), %eax
>         vmovd   %eax, %xmm0
> 
> with:
> 
>         vpinsrw $0, 28(%esp), %xmm0, %xmm0
> 
> (These functions return a bf16, and so only the low 16 bits matter.)
> 
> Bootstrapped & regression-tested on aarch64-linux-gnu and
> x86_64-linux-gnu.  OK to install?
> 
> Richard
> 
> 
> gcc/
> 	* recog.cc (insn_propagation::apply_to_rvalue_1): Handle simple
> 	cases of hardreg propagation in which the register is set and
> 	used in different modes.
> 
> gcc/testsuite/
> 	* gcc.target/i386/pr105033.c: Expect vmovhps for the ia32 version
> 	of foo.
> 	* gcc.target/i386/vect-bfloat16-2b.c: Expect more vpinsrws.
OK
jeff