[PATCH] RISC-V: Add basic support for the Zacas extension

[Jeff Law]

On 7/3/24 3:16 PM, Patrick O'Neill wrote:
> Regarding the amocas.q follow-up patch:
> 
> I'm having trouble with matching any TImode compare-and-swap patterns. 
> Here's the RTL I'm trying:
> 
> (define_mode_iterator SUPERGPR [SI DI TI])
> 
> (define_insn "zacas_atomic_cas_value<mode>"
>    [(set (match_operand:SUPERGPR 0 "register_operand" "=&r")
>      (match_operand:SUPERGPR 1 "memory_operand" "+A"))
>     (set (match_dup 1)
>      (unspec_volatile:SUPERGPR [(match_operand:SUPERGPR 2 "reg_or_0_operand" "rJ")
>                     (match_operand:SUPERGPR 3 "reg_or_0_operand" "rJ")
>                     (match_operand:SI 4 "const_int_operand")  ;; mod_s
>                     (match_operand:SI 5 "const_int_operand")] ;; mod_f
I'd check if it's the mode on operands 4 and 5.  CONST_INTs do not have 
modes.

> {
>    emit_insn (gen_zacas_atomic_cas_value<mode> (operands[1], operands[2],
>                             operands[3], operands[4],
>                             operands[6], operands[7]));
Don't you need to pass operands[1] twice?  Once for operands[0] in the 
final pattern, then again for operands[1] in that final pattern?

jeff