[wwwdocs][PATCH] gcc-14/changes: Update APX inline asm behavior for x86_64
Hongyu Wang
hongyu.wang@intel.com
Tue Jan 9 07:12:04 GMT 2024
Hi,
This patch adds missing description for inline asm behavior and related
compiler switch for APX.
Ok for gcc-wwwdocs?
---
htdocs/gcc-14/changes.html | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html
index e3a68998..73a90d30 100644
--- a/htdocs/gcc-14/changes.html
+++ b/htdocs/gcc-14/changes.html
@@ -342,6 +342,12 @@ a work-in-progress.</p>
NDD, PPX and PUSH2POP2. APX support is available via the
<code>-mapxf</code> compiler switch.
</li>
+ <li>For inline asm support with APX, by default the EGPR feature was
+ disabled to prevent potential illegal instruction with EGPR occurs.
+ To invoke egpr usage in inline asm, use new compiler option
+ -mapx-inline-asm-use-gpr32 and user should ensure the instruction
+ supports EGPR.
+ </li>
<li>New ISA extension support for Intel AVX10.1 was added.
AVX10.1 intrinsics are available via the <code>-mavx10.1</code> or
<code>-mavx10.1-256</code> compiler switch with 256-bit vector size
--
2.31.1
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