[PATCH 4/5] x86: further PR target/100711-like splitting

[Jan Beulich]

On 25.06.2023 07:06, Hongtao Liu wrote:
> On Wed, Jun 21, 2023 at 2:28 PM Jan Beulich via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
>>
>> With respective two-operand bitwise operations now expressable by a
>> single VPTERNLOG, add splitters to also deal with ior and xor
>> counterparts of the original and-only case. Note that the splitters need
>> to be separate, as the placement of "not" differs in the final insns
>> (*iornot<mode>3, *xnor<mode>3) which are intended to pick up one half of
>> the result.
>>
>> gcc/
>>
>>         * config/i386/sse.md: New splitters to simplify
>>         not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
>>
>> gcc/testsuite/
>>
>>         * gcc.target/i386/pr100711-4.c: New test.
>>         * gcc.target/i386/pr100711-5.c: New test.
>>
>> --- a/gcc/config/i386/sse.md
>> +++ b/gcc/config/i386/sse.md
>> @@ -17366,6 +17366,36 @@
>>                         (match_dup 2)))]
>>    "operands[3] = gen_reg_rtx (<MODE>mode);")
>>
>> +(define_split
>> +  [(set (match_operand:VI 0 "register_operand")
>> +       (ior:VI
>> +         (vec_duplicate:VI
>> +           (not:<ssescalarmode>
>> +             (match_operand:<ssescalarmode> 1 "nonimmediate_operand")))
>> +         (match_operand:VI 2 "vector_operand")))]
>> +  "<MODE_SIZE> == 64 || TARGET_AVX512VL
>> +   || (TARGET_AVX512F && !TARGET_PREFER_AVX256)"
>> +  [(set (match_dup 3)
>> +       (vec_duplicate:VI (match_dup 1)))
>> +   (set (match_dup 0)
>> +       (ior:VI (not:VI (match_dup 3)) (match_dup 2)))]
>> +  "operands[3] = gen_reg_rtx (<MODE>mode);")
>> +
>> +(define_split
>> +  [(set (match_operand:VI 0 "register_operand")
>> +       (xor:VI
>> +         (vec_duplicate:VI
>> +           (not:<ssescalarmode>
>> +             (match_operand:<ssescalarmode> 1 "nonimmediate_operand")))
>> +         (match_operand:VI 2 "vector_operand")))]
>> +  "<MODE_SIZE> == 64 || TARGET_AVX512VL
>> +   || (TARGET_AVX512F && !TARGET_PREFER_AVX256)"
>> +  [(set (match_dup 3)
>> +       (vec_duplicate:VI (match_dup 1)))
>> +   (set (match_dup 0)
>> +       (not:VI (xor:VI (match_dup 3) (match_dup 2))))]
>> +  "operands[3] = gen_reg_rtx (<MODE>mode);")
>> +
> Can we merge this splitter(xor:not) into ior:not one with a code
> iterator for xor,ior, They look the same except for the xor/ior.

They're only almost the same: Note (ior (not )) vs (not (xor )) as
the result of the splitting. The difference is necessary to fit
with what patch 1 introduces (which in turn is the way it is to
fit with what generic code transforms things to up front). (I had
it the way you suggest initially, until I figured why one of the
two would end up never being used.)

Jan