[PATCH 18/23] arm: improve tests for vqrdmlsdhq*

[Kyrylo Tkachov]

> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 18/23] arm: improve tests for vqrdmlsdhq*
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Improve test.
> 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise.

Ok.
Thanks,
Kyrill

> ---
>  .../arm/mve/intrinsics/vqrdmlsdhq_m_s16.c     | 34 ++++++++++++++++---
>  .../arm/mve/intrinsics/vqrdmlsdhq_m_s32.c     | 34 ++++++++++++++++---
>  .../arm/mve/intrinsics/vqrdmlsdhq_m_s8.c      | 34 ++++++++++++++++---
>  .../arm/mve/intrinsics/vqrdmlsdhq_s16.c       | 24 +++++++++++--
>  .../arm/mve/intrinsics/vqrdmlsdhq_s32.c       | 24 +++++++++++--
>  .../arm/mve/intrinsics/vqrdmlsdhq_s8.c        | 24 +++++++++++--
>  6 files changed, 156 insertions(+), 18 deletions(-)
> 
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
> index d0054b8ea97..6a5776215ca 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
> @@ -1,23 +1,49 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vqrdmlsdht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int16x8_t
>  foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
>  {
>    return vqrdmlsdhq_m_s16 (inactive, a, b, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s16"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vqrdmlsdht.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int16x8_t
>  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
>  {
>    return vqrdmlsdhq_m (inactive, a, b, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s16"  }  } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
> index 7d3fe45eb4d..9539e249d6a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
> @@ -1,23 +1,49 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vqrdmlsdht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int32x4_t
>  foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
>  {
>    return vqrdmlsdhq_m_s32 (inactive, a, b, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s32"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vqrdmlsdht.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int32x4_t
>  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
>  {
>    return vqrdmlsdhq_m (inactive, a, b, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s32"  }  } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
> index c33f8ea903b..69e54f53a76 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
> @@ -1,23 +1,49 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vqrdmlsdht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int8x16_t
>  foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
>  {
>    return vqrdmlsdhq_m_s8 (inactive, a, b, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s8"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vmsr	p0, (?:ip|fp|r[0-9]+)(?:	@.*|)
> +**	...
> +**	vpst(?:	@.*|)
> +**	...
> +**	vqrdmlsdht.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int8x16_t
>  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
>  {
>    return vqrdmlsdhq_m (inactive, a, b, p);
>  }
> 
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s8"  }  } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
> index 3bd760d38aa..3eb957d6029 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
> @@ -1,21 +1,41 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +**	...
> +**	vqrdmlsdh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int16x8_t
>  foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
>  {
>    return vqrdmlsdhq_s16 (inactive, a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vqrdmlsdh.s16"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vqrdmlsdh.s16	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int16x8_t
>  foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
>  {
>    return vqrdmlsdhq (inactive, a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vqrdmlsdh.s16"  }  } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
> index e23dc94a9ed..3a3fb506c01 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
> @@ -1,21 +1,41 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +**	...
> +**	vqrdmlsdh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int32x4_t
>  foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
>  {
>    return vqrdmlsdhq_s32 (inactive, a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vqrdmlsdh.s32"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vqrdmlsdh.s32	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int32x4_t
>  foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
>  {
>    return vqrdmlsdhq (inactive, a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vqrdmlsdh.s32"  }  } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
> index 836e04af566..65ac15da9c7 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
> @@ -1,21 +1,41 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +**	...
> +**	vqrdmlsdh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int8x16_t
>  foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
>  {
>    return vqrdmlsdhq_s8 (inactive, a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vqrdmlsdh.s8"  }  } */
> 
> +/*
> +**foo1:
> +**	...
> +**	vqrdmlsdh.s8	q[0-9]+, q[0-9]+, q[0-9]+(?:	@.*|)
> +**	...
> +*/
>  int8x16_t
>  foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
>  {
>    return vqrdmlsdhq (inactive, a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vqrdmlsdh.s8"  }  } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1