[PATCH v2 0/3] RISC-V: Support zfinx extension

jiawei jiawei@iscas.ac.cn
Fri Nov 5 13:00:56 GMT 2021

Zfinx extension[1] had already finished public review. Here is the implementation patch set that reuse floating point pattern and ban the use of fpr when use zfinx as a target.

Current works can be find in follow links, we will keep update zhinx and zhinxmin after zfh extension goes upstream.

For test you can use qemu or spike that support zfinx extension, the
qemu will go upstream soon and spike is still in review:

Thanks for Tariq Kurd, Kito Cheng, Jim Willson, Jeremy Bennett helped us a lot with this work.

[1] https://github.com/riscv/riscv-zfinx/blob/main/zfinx-1.0.0-rc.pdf

Version log:

v2: As Kito Cheng's comment, add Changelog part in patches, update imply info in riscv-common.c,
remove useless check and update annotation in riscv.c.

jiawei (3):
  RISC-V: Minimal support of zfinx extension
  RISC-V: Target support for zfinx extension
  RISC-V: Limit regs use  for zfinx extension

 gcc/common/config/riscv/riscv-common.c |  7 +++
 gcc/config/riscv/arch-canonicalize     |  1 +
 gcc/config/riscv/constraints.md        |  3 +-
 gcc/config/riscv/riscv-builtins.c      |  4 +-
 gcc/config/riscv/riscv-c.c             |  2 +-
 gcc/config/riscv/riscv-opts.h          |  6 +++
 gcc/config/riscv/riscv.c               | 14 ++++-
 gcc/config/riscv/riscv.md              | 72 +++++++++++++-------------
 gcc/config/riscv/riscv.opt             |  3 ++
 9 files changed, 71 insertions(+), 41 deletions(-)


More information about the Gcc-patches mailing list