[PATCH] testsuite/arm: Improve mve-vshr.c

[Christophe Lyon]

Ping?

On Tue, 27 Apr 2021 at 13:32, Christophe Lyon
<christophe.lyon@linaro.org> wrote:
>
> Vector right shifts by immediate use vshr, while right shifts by
> vectors instead use vneg and vshl.
>
> This patch adds the corresponding scan-assembler-times that were
> missing.
>
> 2021-04-22  Christophe Lyon  <christophe.lyon@linaro.org>
>
>         gcc/testsuite/
>         * gcc.target/arm/simd/mve-vshr.c: Add more scan-assembler-times.
> ---
>  gcc/testsuite/gcc.target/arm/simd/mve-vshr.c | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> index d4e658c..d4258e9 100644
> --- a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> @@ -55,5 +55,12 @@ FUNC_IMM(u, uint, 8, 16, >>, vshrimm)
>
>  /* MVE has only 128-bit vectors, so we can vectorize only half of the
>     functions above.  */
> +/* Vector right shifts use vneg and left shifts.  */
> +/* { dg-final { scan-assembler-times {vshl.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
> +/* { dg-final { scan-assembler-times {vshl.u[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
> +/* { dg-final { scan-assembler-times {vneg.s[0-9]+  q[0-9]+, q[0-9]+} 6 } } */
> +
> +
> +/* Shift by immediate.  */
>  /* { dg-final { scan-assembler-times {vshr.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
>  /* { dg-final { scan-assembler-times {vshr.u[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
> --
> 2.7.4
>