[PATCH] aarch64: PR target/99822 Don't allow zero register in first operand of SUBS/ADDS-immediate
Kyrylo Tkachov
Kyrylo.Tkachov@arm.com
Tue Mar 30 14:40:00 GMT 2021
Hi all,
In this PR we end up generating an invalid instruction:
adds x1,xzr,#2
because the pattern accepts zero as an operand in the comparison, but the instruction doesn't.
Fix it by adjusting the predicate and constraints.
Bootstrapped and tested on aarch64-none-linux-gnu.
Pushing to trunk.
Thanks,
Kyrill
gcc/ChangeLog:
PR target/99822
* config/aarch64/aarch64.md (sub<mode>3_compare1_imm): Do not allow zero
in operand 1.
gcc/testsuite/ChangeLog:
PR target/99822
* gcc.c-torture/compile/pr99822.c: New test.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: zero-cmpimm.patch
Type: application/octet-stream
Size: 1674 bytes
Desc: zero-cmpimm.patch
URL: <https://gcc.gnu.org/pipermail/gcc-patches/attachments/20210330/f42cb4e9/attachment-0001.obj>
More information about the Gcc-patches
mailing list