[PATCH] RISC-V: Add tune info for T-HEAD C906.

Kito Cheng kito.cheng@gmail.com
Tue Jun 22 09:12:55 GMT 2021


Thanks, committed :)

On Mon, Jun 21, 2021 at 8:44 PM Jojo R via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
>         gcc/
>         * config/riscv/riscv.c (thead_c906_tune_info): New.
>         * config/riscv/riscv.c (riscv_tune_info_table): Use new tune.
> ---
>  gcc/config/riscv/riscv.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
> index 1baa2990ee27..576960bb37cb 100644
> --- a/gcc/config/riscv/riscv.c
> +++ b/gcc/config/riscv/riscv.c
> @@ -300,6 +300,19 @@ static const struct riscv_tune_param sifive_7_tune_info = {
>    true,                                                /* slow_unaligned_access */
>  };
>
> +/* Costs to use when optimizing for T-HEAD c906.  */
> +static const struct riscv_tune_param thead_c906_tune_info = {
> +  {COSTS_N_INSNS (4), COSTS_N_INSNS (5)}, /* fp_add */
> +  {COSTS_N_INSNS (4), COSTS_N_INSNS (5)}, /* fp_mul */
> +  {COSTS_N_INSNS (20), COSTS_N_INSNS (20)}, /* fp_div */
> +  {COSTS_N_INSNS (4), COSTS_N_INSNS (4)}, /* int_mul */
> +  {COSTS_N_INSNS (6), COSTS_N_INSNS (6)}, /* int_div */
> +  1,            /* issue_rate */
> +  3,            /* branch_cost */
> +  5,            /* memory_cost */
> +  false,            /* slow_unaligned_access */
> +};
> +
>  /* Costs to use when optimizing for size.  */
>  static const struct riscv_tune_param optimize_size_tune_info = {
>    {COSTS_N_INSNS (1), COSTS_N_INSNS (1)},      /* fp_add */
> @@ -348,6 +361,7 @@ static const struct riscv_tune_info riscv_tune_info_table[] = {
>    { "sifive-3-series", generic, &rocket_tune_info },
>    { "sifive-5-series", generic, &rocket_tune_info },
>    { "sifive-7-series", sifive_7, &sifive_7_tune_info },
> +  { "thead-c906", generic, &thead_c906_tune_info },
>    { "size", generic, &optimize_size_tune_info },
>  };
>
> --
> 2.24.3 (Apple Git-128)
>


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