[PATCH v3 2/2] x86: Add vec_duplicate<mode> expander
Uros Bizjak
ubizjak@gmail.com
Wed Jun 9 06:40:51 GMT 2021
On Tue, Jun 8, 2021 at 7:59 PM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> 1. Update vec_duplicate to allow to fail so that backend can only allow
> broadcasting an integer constant to a vector when broadcast instruction
> is available. This can be used by memset expander to avoid vec_duplicate
> when loading from constant pool is more efficient.
> 2. Add vec_duplicate<mode> expander and enable vec_duplicate from a
> non-standard SSE constant integer only if vector broadcast is available.
>
> * config/i386/i386-expand.c (ix86_expand_integer_vec_duplicate):
> New function.
> * config/i386/i386-protos.h (ix86_expand_integer_vec_duplicat):
> New prototype.
> * config/i386/sse.md (INT_BROADCAST_MODE): New mode iterator.
> (vec_duplicate<mode>): New expander.
> * doc/md.texi: Update vec_duplicate.
> ---
> gcc/config/i386/i386-expand.c | 21 +++++++++++++++++++++
> gcc/config/i386/i386-protos.h | 1 +
> gcc/config/i386/sse.md | 20 ++++++++++++++++++++
> gcc/doc/md.texi | 2 --
> 4 files changed, 42 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
> index 29d96805d9d..145e028353c 100644
> --- a/gcc/config/i386/i386-expand.c
> +++ b/gcc/config/i386/i386-expand.c
> @@ -15669,6 +15669,27 @@ ix86_expand_vector_extract (bool mmx_ok, rtx target, rtx vec, int elt)
> }
> }
>
> +/* Expand integer vec_duplicate. Return true if successful. */
> +
> +bool
> +ix86_expand_integer_vec_duplicate (rtx *operands)
> +{
> + /* Enable VEC_DUPLICATE from a non-standard SSE constant integer only
> + if vector broadcast is available. */
> + if (CONST_INT_P (operands[1])
> + && (!TARGET_AVX2
> + || standard_sse_constant_p (operands[1],
> + GET_MODE (operands[0]))))
> + return false;
> +
> + if (!ix86_expand_vector_init_duplicate (false,
> + GET_MODE (operands[0]),
> + operands[0], operands[1]))
> + gcc_unreachable ();
> +
> + return true;
> +}
> +
> /* Generate code to copy vector bits i / 2 ... i - 1 from vector SRC
> to bits 0 ... i / 2 - 1 of vector DEST, which has the same mode.
> The upper bits of DEST are undefined, though they shouldn't cause
> diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
> index 578750a2532..dc191dc18ec 100644
> --- a/gcc/config/i386/i386-protos.h
> +++ b/gcc/config/i386/i386-protos.h
> @@ -260,6 +260,7 @@ extern void ix86_expand_mul_widen_hilo (rtx, rtx, rtx, bool, bool);
> extern void ix86_expand_sse2_mulv4si3 (rtx, rtx, rtx);
> extern void ix86_expand_sse2_mulvxdi3 (rtx, rtx, rtx);
> extern void ix86_expand_sse2_abs (rtx, rtx);
> +extern bool ix86_expand_integer_vec_duplicate (rtx *);
>
> /* In i386-c.c */
> extern void ix86_target_macros (void);
> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> index 2a34756be2a..a227295cc1d 100644
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -24570,3 +24570,23 @@
> "TARGET_WIDEKL"
> "aes<aeswideklvariant>\t{%0}"
> [(set_attr "type" "other")])
> +
> +;; Modes handled by broadcast patterns.
> +(define_mode_iterator INT_BROADCAST_MODE
> + [(V64QI "TARGET_AVX512F") (V32QI "TARGET_AVX") V16QI
> + (V32HI "TARGET_AVX512F") (V16HI "TARGET_AVX") V8HI
> + (V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX") V4SI
> + (V8DI "TARGET_AVX512F") (V4DI "TARGET_64BIT") V2DI])
In ix86_convert_const_wide_int_to_broadcast, there is:
+ else if (TARGET_64BIT
+ && ix86_broadcast (val, GET_MODE_BITSIZE (DImode),
+ val_broadcast))
So, shouldn't all modes with DImode inner mode have TARGET_64BIT predicate?
Uros.
> +;; Broadcast from an integer. NB: Enable broadcast only if we can move
> +;; from GPR to SSE register directly.
> +(define_expand "vec_duplicate<mode>"
> + [(set (match_operand:INT_BROADCAST_MODE 0 "register_operand")
> + (vec_duplicate:INT_BROADCAST_MODE
> + (match_operand:<ssescalarmode> 1 "general_operand")))]
> + "TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC"
> +{
> + if (!ix86_expand_integer_vec_duplicate (operands))
> + FAIL;
> + DONE;
> +})
> diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
> index 00caf3844cc..e66c41c4779 100644
> --- a/gcc/doc/md.texi
> +++ b/gcc/doc/md.texi
> @@ -5077,8 +5077,6 @@ the mode appropriate for one element of @var{m}.
> This pattern only handles duplicates of non-constant inputs. Constant
> vectors go through the @code{mov@var{m}} pattern instead.
>
> -This pattern is not allowed to @code{FAIL}.
> -
> @cindex @code{vec_series@var{m}} instruction pattern
> @item @samp{vec_series@var{m}}
> Initialize vector output operand 0 so that element @var{i} is equal to
> --
> 2.31.1
>
More information about the Gcc-patches
mailing list