[PATCH] Adjust docu of TARGET_VECTORIZE_VEC_PERM_CONST

[Richard Biener]

On Wed, Jul 28, 2021 at 8:44 AM Andreas Krebbel via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> There are also memory operands passed for in0 and in1.
>
> Ok for mainline?

They can also be constant vectors, I'd just not specify the operand
kind - usually
expanders are not limited as to what they feed down.

> gcc/ChangeLog:
>
>         * target.def: Describe in0 and in1 as being either register or
>         memory operands.
>         * doc/tm.texi: Regenerate.
> ---
>  gcc/doc/tm.texi | 7 ++++---
>  gcc/target.def  | 7 ++++---
>  2 files changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
> index c8f4abe3e41..31f188daf00 100644
> --- a/gcc/doc/tm.texi
> +++ b/gcc/doc/tm.texi
> @@ -6124,9 +6124,10 @@ This hook is used to test whether the target can permute up to two
>  vectors of mode @var{mode} using the permutation vector @code{sel}, and
>  also to emit such a permutation.  In the former case @var{in0}, @var{in1}
>  and @var{out} are all null.  In the latter case @var{in0} and @var{in1} are
> -the source vectors and @var{out} is the destination vector; all three are
> -registers of mode @var{mode}.  @var{in1} is the same as @var{in0} if
> -@var{sel} describes a permutation on one vector instead of two.
> +the source vectors and @var{out} is the destination vector.  The destination
> +vector is a register of mode @var{mode} while the source vectors can be either
> +register or memory operands of mode @var{mode}.  @var{in1} is the same as
> +@var{in0} if @var{sel} describes a permutation on one vector instead of two.
>
>  Return true if the operation is possible, emitting instructions for it
>  if rtxes are provided.
> diff --git a/gcc/target.def b/gcc/target.def
> index 2e40448e6c5..b368d81be63 100644
> --- a/gcc/target.def
> +++ b/gcc/target.def
> @@ -1860,9 +1860,10 @@ DEFHOOK
>  vectors of mode @var{mode} using the permutation vector @code{sel}, and\n\
>  also to emit such a permutation.  In the former case @var{in0}, @var{in1}\n\
>  and @var{out} are all null.  In the latter case @var{in0} and @var{in1} are\n\
> -the source vectors and @var{out} is the destination vector; all three are\n\
> -registers of mode @var{mode}.  @var{in1} is the same as @var{in0} if\n\
> -@var{sel} describes a permutation on one vector instead of two.\n\
> +the source vectors and @var{out} is the destination vector.  The destination\n\
> +vector is a register of mode @var{mode} while the source vectors can be either\n\
> +register or memory operands of mode @var{mode}.  @var{in1} is the same as\n\
> +@var{in0} if @var{sel} describes a permutation on one vector instead of two.\n\
>  \n\
>  Return true if the operation is possible, emitting instructions for it\n\
>  if rtxes are provided.\n\
> --
> 2.31.1
>