[PATCH v3 2/2] MIPS: add builtime option for -mcompact-branches

[YunQiang Su]

For R6+ target, it allows to configure gcc to use compact branches only.

gcc/ChangeLog:
	* config.gcc: add -with-compact-branches=policy build option.
	* doc/install.texi: Likewise.
---
 gcc/ChangeLog        |  5 +++++
 gcc/config.gcc       | 12 +++++++++++-
 gcc/doc/install.texi | 19 +++++++++++++++++++
 3 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index caa3fda48ce..c5fae50e782 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2021-02-20  YunQiang Su  <yunqiang.su@cipunited.com>
+
+	* config.gcc: add -with-compact-branches=policy build option.
+	* doc/install.texi: Likewise.
+
 2021-02-20  YunQiang Su  <yunqiang.su@cipunited.com>
 
 	* config/mips/mips.c (mips_option_override):
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 17fea83b2e4..047f5631067 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4743,7 +4743,7 @@ case "${target}" in
 		;;
 
 	mips*-*-*)
-		supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1 madd4"
+		supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1 madd4 compact-branches"
 
 		case ${with_float} in
 		"" | soft | hard)
@@ -4896,6 +4896,16 @@ case "${target}" in
 			exit 1
 			;;
 		esac
+
+		case ${with_compact_branches} in
+		never | always | optimal)
+			with_compact_branches=${with_compact_branches}
+			;;
+		*)
+			echo "Unknown compact-branches policy used in --with-compact-branches" 1>&2
+			exit 1
+			;;
+		esac
 		;;
 
 	nds32*-*-*)
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 4c38244ae58..865630826c6 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -1464,6 +1464,25 @@ systems that support conditional traps).
 Division by zero checks use the break instruction.
 @end table
 
+@item --with-compact-branches=@var{policy}
+Specify how the compiler should generate code for checking for
+division by zero.  This option is only supported on the MIPS target.
+The possibilities for @var{type} are:
+@table @code
+@item optimal
+Cause a delay slot branch to be used if one is available in the
+current ISA and the delay slot is successfully filled. If the delay slot
+is not filled, a compact branch will be chosen if one is available.
+@item never
+Ensures that compact branch instructions will never be generated.
+@item always
+Ensures that a compact branch instruction will be generated if available.
+If a compact branch instruction is not available,
+a delay slot form of the branch will be used instead.
+This option is supported from MIPS Release 6 onwards.
+For pre-R6, this option is just same as never/optimal.
+@end table
+
 @c If you make --with-llsc the default for additional targets,
 @c update the --with-llsc description in the MIPS section below.
 
-- 
2.20.1