[PATCH] rs6000: Use rldimi for vec init instead of shift + ior

[Segher Boessenkool]

Hi!

On Wed, Feb 03, 2021 at 02:37:05PM +0800, Kewen.Lin wrote:
> This patch merges the previously approved one[1] and its relied patch
> made by Segher here[2], it's to make unsigned int vector init go with
> rldimi to merge two integers instead of shift and ior.

> gcc/ChangeLog:
> 
> 2020-02-03  Segher Boessenkool  <segher@kernel.crashing.org>
> 	    Kewen Lin  <linkw@gcc.gnu.org>
> 
> 	* config/rs6000/rs6000.md (*rotl<mode>3_insert_3): Renamed to...
> 	(rotl<mode>3_insert_3): ...this.
> 	(plus_ior_xor): New code_iterator.
> 	(define_split for GPR rl*imi): New splitter.
> 	* config/rs6000/vsx.md (vsx_init_v4si): Use gen_rotldi3_insert_3
> 	for integer merging.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/powerpc/vec-init-10.c: New test.

Is there a PR you should mention here?

> +/* { dg-final { scan-assembler-not "sldi" } } */
> +/* { dg-final { scan-assembler-not "or" } } */
> +/* { dg-final { scan-assembler-times {\mrldimi\M} 4 } } */

/* { dg-final { scan-assembler-not {\msldi\M} } } */
/* { dg-final { scan-assembler-not {\mor\M} } } */
/* { dg-final { scan-assembler-times {\mrldimi\M} 4 } } */

Okay for trunk with that tweak.  Thanks!


Segher