[PATCH] aarch64: Use RTL builtins for [su]mlal_high_lane[q] intrinsics
Kyrylo Tkachov
Kyrylo.Tkachov@arm.com
Wed Feb 3 13:57:55 GMT 2021
> -----Original Message-----
> From: Jonathan Wright <Jonathan.Wright@arm.com>
> Sent: 03 February 2021 12:39
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
> Subject: [PATCH] aarch64: Use RTL builtins for [su]mlal_high_lane[q]
> intrinsics
>
> Hi,
>
> As subject, this patch rewrites [su]mlal_high_lane[q] Neon intrinsics to use
> RTL builtins rather than inline assembly code, allowing for better scheduling
> and optimization.
>
> Regression tested and bootstrapped on aarch64-none-linux-gnu and
> aarch64_be-none-elf - no issues.
>
> Ok for master?
Ok.
Thanks,
Kyrill
>
> Thanks,
> Jonathan
>
> ---
>
> gcc/ChangeLog:
>
> 2021-02-02 Jonathan Wright <jonathan.wright@arm.com>
>
> * config/aarch64/aarch64-simd-builtins.def: Add
> [su]mlal_hi_lane[q] builtin generator macros.
> * config/aarch64/aarch64-simd.md
> (aarch64_<su>mlal_hi_lane<mode>_insn): Define.
> (aarch64_<su>mlal_hi_lane<mode>): Define.
> (aarch64_<su>mlal_hi_laneq<mode>_insn): Define.
> (aarch64_<su>mlal_hi_laneq<mode>): Define.
> * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Use RTL
> builtin instead of inline asm.
> (vmlal_high_lane_s32): Likewise.
> (vmlal_high_lane_u16): Likewise.
> (vmlal_high_lane_u32): Likewise.
> (vmlal_high_laneq_s16): Likewise.
> (vmlal_high_laneq_s32): Likewise.
> (vmlal_high_laneq_u16): Likewise.
> (vmlal_high_laneq_u32): Likewise.
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