[PATCH, rs6000] Disable gimple fold for float or double vec_minmax when fast-math is not set

HAO CHEN GUI guihaoc@linux.ibm.com
Wed Aug 25 08:44:53 GMT 2021


On 25/8/2021 下午 4:17, HAO CHEN GUI via Gcc-patches wrote:
> Hi Kewen,
>
>   Thanks for your advice.
>
> On 25/8/2021 下午 3:50, Kewen.Lin wrote:
>> Hi Haochen,
>>
>> on 2021/8/25 下午3:06, HAO CHEN GUI via Gcc-patches wrote:
>>> Hi,
>>>
>>>      I refined the patch according to Bill's advice. I pasted the 
>>> ChangeLog and diff file here. If it doesn't work, please let me 
>>> know. Thanks.
>>>
>>> 2021-08-25 Haochen Gui <guihaoc@linux.ibm.com>
>>>
>>> gcc/
>> IIUC, this patch is for PR93127, one line for PR is missing here.
> The patch does comes from the PR, but it doesn't work as the PR 
> requires. So I am not sure if I should add the PR number.
>>
>>>      * config/rs6000/rs6000-call.c (rs6000_gimple_fold_builtin):
>>>      Modify the VSX_BUILTIN_XVMINDP, ALTIVEC_BUILTIN_VMINFP,
>>>      VSX_BUILTIN_XVMAXDP, ALTIVEC_BUILTIN_VMAXFP expansions.
>>>
>>> gcc/testsuite/
>> Same, need a PR line.
>>
>>>      * gcc.target/powerpc/vec-minmax-1.c: New test.
>>>      * gcc.target/powerpc/vec-minmax-2.c: Likewise.
>>>
>> Maybe it's better to use pr93127-{1,2}.c for case names?
>>
>> ...
>>> --- /dev/null
>>> +++ b/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c
>>> @@ -0,0 +1,53 @@
>>> +/* { dg-do compile { target { powerpc64le-*-* } } } */
>> I guess this "powerpc64le" isn't intentional?  The test case
>> has the macro to distinguish endianess, I assume we want this
>> to be compiled on BE?  If so, we just put the line below instead?
> It should be tested on BE as well. I will replace it with 
> 'powerpc*-*-* && lp64'.
It should be 'powerpc*-*-*'. Thanks again!
>>
>> /* { dg-do compile } */
>>
>> And it needs extra testing on BE as well.  :)
>>
>> Thanks for fixing this!
>>
>> BR,
>> Kewen
>>
>>> +/* { dg-require-effective-target powerpc_p9vector_ok } */
>>> +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */
>>> +/* { dg-final { scan-assembler-times {\mxvmaxdp\M} 1 } } */
>>> +/* { dg-final { scan-assembler-times {\mxvmaxsp\M} 1 } } */
>>> +/* { dg-final { scan-assembler-times {\mxvmindp\M} 1 } } */
>>> +/* { dg-final { scan-assembler-times {\mxvminsp\M} 1 } } */
>>> +
>>> +/* This test verifies that float or double vec_min/max are bound to
>>> +   xv[min|max][d|s]p instructions when fast-math is not set. */
>>> +
>>> +
>>> +#include <altivec.h>
>>> +
>>> +#ifdef _BIG_ENDIAN
>>> +   const int PREF_D = 0;
>>> +#else
>>> +   const int PREF_D = 1;
>>> +#endif
>>> +
>>> +double vmaxd (double a, double b)
>>> +{
>>> +  vector double va = vec_promote (a, PREF_D);
>>> +  vector double vb = vec_promote (b, PREF_D);
>>> +  return vec_extract (vec_max (va, vb), PREF_D);
>>> +}
>>> +
>>> +double vmind (double a, double b)
>>> +{
>>> +  vector double va = vec_promote (a, PREF_D);
>>> +  vector double vb = vec_promote (b, PREF_D);
>>> +  return vec_extract (vec_min (va, vb), PREF_D);
>>> +}
>>> +
>>> +#ifdef _BIG_ENDIAN
>>> +   const int PREF_F = 0;
>>> +#else
>>> +   const int PREF_F = 3;
>>> +#endif
>>> +
>>> +float vmaxf (float a, float b)
>>> +{
>>> +  vector float va = vec_promote (a, PREF_F);
>>> +  vector float vb = vec_promote (b, PREF_F);
>>> +  return vec_extract (vec_max (va, vb), PREF_F);
>>> +}
>>> +
>>> +float vminf (float a, float b)
>>> +{
>>> +  vector float va = vec_promote (a, PREF_F);
>>> +  vector float vb = vec_promote (b, PREF_F);
>>> +  return vec_extract (vec_min (va, vb), PREF_F);
>>> +}
>>> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c 
>>> b/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c
>>> new file mode 100644
>>> index 00000000000..d318b933181
>>> --- /dev/null
>>> +++ b/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c
>>> @@ -0,0 +1,51 @@
>>> +/* { dg-do compile { target { powerpc64le-*-* } } } */
>>> +/* { dg-require-effective-target powerpc_p9vector_ok } */
>>> +/* { dg-options "-O2 -mdejagnu-cpu=power9 -ffast-math" } */
>>> +/* { dg-final { scan-assembler-times {\mxsmaxcdp\M} 2 } } */
>>> +/* { dg-final { scan-assembler-times {\mxsmincdp\M} 2 } } */
>>> +
>>> +/* This test verifies that float or double vec_min/max can be 
>>> converted
>>> +   to scalar comparison when fast-math is set.  */
>>> +
>>> +
>>> +#include <altivec.h>
>>> +
>>> +#ifdef _BIG_ENDIAN
>>> +   const int PREF_D = 0;
>>> +#else
>>> +   const int PREF_D = 1;
>>> +#endif
>>> +
>>> +double vmaxd (double a, double b)
>>> +{
>>> +  vector double va = vec_promote (a, PREF_D);
>>> +  vector double vb = vec_promote (b, PREF_D);
>>> +  return vec_extract (vec_max (va, vb), PREF_D);
>>> +}
>>> +
>>> +double vmind (double a, double b)
>>> +{
>>> +  vector double va = vec_promote (a, PREF_D);
>>> +  vector double vb = vec_promote (b, PREF_D);
>>> +  return vec_extract (vec_min (va, vb), PREF_D);
>>> +}
>>> +
>>> +#ifdef _BIG_ENDIAN
>>> +   const int PREF_F = 0;
>>> +#else
>>> +   const int PREF_F = 3;
>>> +#endif
>>> +
>>> +float vmaxf (float a, float b)
>>> +{
>>> +  vector float va = vec_promote (a, PREF_F);
>>> +  vector float vb = vec_promote (b, PREF_F);
>>> +  return vec_extract (vec_max (va, vb), PREF_F);
>>> +}
>>> +
>>> +float vminf (float a, float b)
>>> +{
>>> +  vector float va = vec_promote (a, PREF_F);
>>> +  vector float vb = vec_promote (b, PREF_F);
>>> +  return vec_extract (vec_min (va, vb), PREF_F);
>>> +}
>>>


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