[PATCH 08/34] rs6000: Add Power9 builtins

Segher Boessenkool segher@kernel.crashing.org
Tue Aug 24 15:38:32 GMT 2021


On Tue, Aug 24, 2021 at 09:20:09AM -0500, Bill Schmidt wrote:
> On 8/23/21 4:40 PM, Segher Boessenkool wrote:
> >On Thu, Jul 29, 2021 at 08:30:55AM -0500, Bill Schmidt wrote:
> >>+; These things need some review to see whether they really require
> >>+; MASK_POWERPC64.  For xsxexpdp, this seems to be fine for 32-bit,
> >>+; because the result will always fit in 32 bits and the return
> >>+; value is SImode; but the pattern currently requires TARGET_64BIT.
> >That is wrong then?  It should never have TARGET_64BIT if it isn't
> >addressing memory (or the like).  Did you just typo this?
> Not a typo... I was referring to the condition in the following:
> ;; VSX Scalar Extract Exponent Double-Precision
> (define_insn "xsxexpdp"
>   [(set (match_operand:DI 0 "register_operand" "=r")
>         (unspec:DI [(match_operand:DF 1 "vsx_register_operand" "wa")]
>          UNSPEC_VSX_SXEXPDP))]
>   "xsxexpdp %0,%x1"
>   [(set_attr "type" "integer")])

That looks wrong.  It should be TARGET_POWERPC64 afaics.

> >>+; On the other hand, xsxsigdp has a result that doesn't fit in
> >>+; 32 bits, and the return value is DImode, so it seems that
> >>+; TARGET_64BIT (actually TARGET_POWERPC64) is justified.  TBD. ####
> >Because xsxsigdp needs it, it makes sense to have it for xsxexpdp as
> >well, or we would get a weird holey API.

Both should have TARGET_POWERPC64 (and the underlying patterns as well
of course, we don't like ICEs so much).


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