[PATCH] [i386] Fix ICE.

Uros Bizjak ubizjak@gmail.com
Mon Aug 16 09:20:57 GMT 2021


On Mon, Aug 16, 2021 at 11:19 AM liuhongt <hongtao.liu@intel.com> wrote:
>
> Hi:
>   avx512f_scalef<mode>2 only accept register_operand for operands[1],
> force it to reg in ldexp<mode>3.
>
>   Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
>   Ok for trunk.
>
> gcc/ChangeLog:
>
>         PR target/101930
>         * config/i386/i386.md (ldexp<mode>3): Force operands[1] to
>         reg.
>
> gcc/testsuite/ChangeLog:
>
>         PR target/101930
>         * gcc.target/i386/pr101930.c: New test.

OK.

Thanks,
Uros.

> ---
>  gcc/config/i386/i386.md                  | 4 +---
>  gcc/testsuite/gcc.target/i386/pr101930.c | 9 +++++++++
>  2 files changed, 10 insertions(+), 3 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr101930.c
>
> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
> index 4a8e8fea290..41d85623ad6 100644
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -17938,9 +17938,7 @@ (define_expand "ldexp<mode>3"
>    if (TARGET_AVX512F && TARGET_SSE_MATH)
>     {
>       rtx op2 = gen_reg_rtx (<MODE>mode);
> -
> -     if (!nonimmediate_operand (operands[1], <MODE>mode))
> -       operands[1] = force_reg (<MODE>mode, operands[1]);
> +     operands[1] = force_reg (<MODE>mode, operands[1]);
>
>       emit_insn (gen_floatsi<mode>2 (op2, operands[2]));
>       emit_insn (gen_avx512f_scalef<mode>2 (operands[0], operands[1], op2));
> diff --git a/gcc/testsuite/gcc.target/i386/pr101930.c b/gcc/testsuite/gcc.target/i386/pr101930.c
> new file mode 100644
> index 00000000000..7207dd18377
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr101930.c
> @@ -0,0 +1,9 @@
> +/* { dg-do compile } */
> +/* { dg-options "-mavx512f -O2 -mfpmath=sse -ffast-math" } */
> +double a;
> +double
> +__attribute__((noipa))
> +foo (int b)
> +{
> +  return __builtin_ldexp (a, b);
> +}
> --
> 2.27.0
>


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