[PATCH V2] aarch64: Don't include vec_select high-half in SIMD subtract cost

Jonathan Wright Jonathan.Wright@arm.com
Thu Aug 5 08:29:10 GMT 2021


Hi,

V2 of this change implements the same approach as for the multiply
and add-widen patches.

Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.

Ok for master?

Thanks,
Jonathan

---

gcc/ChangeLog:

2021-07-28  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64.c: Traverse RTL tree to prevent cost
	of vec_select high-half from being added into Neon subtract
	cost.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/vsubX_high_cost.c: New test.



From: Jonathan Wright
Sent: 29 July 2021 10:23
To: gcc-patches@gcc.gnu.org <gcc-patches@gcc.gnu.org>
Cc: Richard Sandiford <Richard.Sandiford@arm.com>; Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
Subject: [PATCH] aarch64: Don't include vec_select high-half in SIMD subtract cost 
 
Hi,

The Neon subtract-long/subract-widen instructions can select the top
or bottom half of the operand registers. This selection does not
change the cost of the underlying instruction and this should be
reflected by the RTL cost function.

This patch adds RTL tree traversal in the Neon subtract cost function
to match vec_select high-half of its operands. This traversal
prevents the cost of the vec_select from being added into the cost of
the subtract - meaning that these instructions can now be emitted in
the combine pass as they are no longer deemed prohibitively
expensive.

Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.

Ok for master?

Thanks,
Jonathan

---

gcc/ChangeLog:

2021-07-28  Jonathan Wright  <jonathan.wright@arm.com>

        * config/aarch64/aarch64.c: Traverse RTL tree to prevent cost
        of vec_select high-half from being added into Neon subtract
        cost.

gcc/testsuite/ChangeLog:

        * gcc.target/aarch64/vsubX_high_cost.c: New test.
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