[PATCH 0/2] Rework adding Power10 IEEE 128-bit min, max, and conditional move

[Michael Meissner]

These patches are my latest versions of the patches to add IEEE 128-bit min,
max, and conditional move to GCC.  They correspond to the earlier patches #3
and #4 (patches #1 and #2 have been installed).

The first patch just adds support for the xsmincqp and xsmaxcqp instructions.
Due to the NaN rules, this patch will only generate the minc/maxc instructions
if -ffast-math is used.  Unlike the previous patch, I did not try to combine
min/max for IEEE 128-bit with the existing power9 min/max for SF/DF mode.
Instead, I just created a new insn (without a generator for it).

The second patch adds the support for doing a conditional move, where the
comparison is one of the 4 binary floating point scalar types.  The types being
moved do not have to be the same as the types for comparison.  Unlike the
previous patches, I did not try to combine the normal comparison and the
reversed comparison into one insn.  Instead, I kept the two insns.

After using it for awhile, I did not like using SFDFKFTF as the mode for all 4
floating point types.  Instead, I used FPMASK and FPMASK2 for the cases that we
generate the compare and set mask instruction to do the conditional move.

As with power9, the conditional move allows some forms of min/max to be
generated without using -ffast-math, assuming the tests give the right results
for NaN's.

I have built bootstrapped compilers with/without these patches, and there were
no regressions in the test suite.  Can I check these patches into the master
branch?

I do not anticipate needing to back port these changes to GCC 10.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797