[PATCH] aarch64: Fix ICE on fpsr fpcr getters [PR96968]
Andrea Corallo
andrea.corallo@arm.com
Mon Sep 14 16:38:19 GMT 2020
Hi all,
I'd like to submit this patch to fix PR96968 and add the corresponding
test.
The fix makes sure the target of these getters is a register so the
insn can be pattern matched correctly.
Regtested and bootsraped on aarch64-linux-gnu.
Okay for trunk?
Thanks
Andrea
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>From 74f5223724fe8ff2649ce6a0860f415052340a04 Mon Sep 17 00:00:00 2001
From: Andrea Corallo <andrea.corallo@arm.com>
Date: Mon, 14 Sep 2020 14:47:24 +0100
Subject: [PATCH] aarch64: Fix ICE on fpsr fpcr getters [PR96968]
gcc/ChangeLog
2020-09-14 Andrea Corallo <andrea.corallo@arm.com>
PR target/96968
* config/aarch64/aarch64-builtins.c
(aarch64_expand_fpsr_fpcr_setter): Fix comment nit.
(aarch64_expand_fpsr_fpcr_getter): New function, expand these
getters and have the target in a register.
(aarch64_general_expand_builtin): Make use of.
gcc/testsuite/ChangeLog
2020-09-14 Andrea Corallo <andrea.corallo@arm.com>
PR target/96968
* gcc.target/aarch64/pr96968.c: New test.
---
gcc/config/aarch64/aarch64-builtins.c | 24 ++++++++++++-------
gcc/testsuite/gcc.target/aarch64/pr96968.c | 28 ++++++++++++++++++++++
2 files changed, 43 insertions(+), 9 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr96968.c
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index 4f33dd936c7..f640a9e5de1 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -2024,7 +2024,7 @@ aarch64_expand_builtin_memtag (int fcode, tree exp, rtx target)
return target;
}
-/* Expand an expression EXP as fpsr or cpsr setter (depending on
+/* Expand an expression EXP as fpsr or fpcr setter (depending on
UNSPEC) using MODE. */
static void
aarch64_expand_fpsr_fpcr_setter (int unspec, machine_mode mode, tree exp)
@@ -2034,6 +2034,16 @@ aarch64_expand_fpsr_fpcr_setter (int unspec, machine_mode mode, tree exp)
emit_insn (gen_aarch64_set (unspec, mode, op));
}
+/* Expand a fpsr or fpcr getter (depending on UNSPEC) using MODE.
+ Return the target. */
+static rtx
+aarch64_expand_fpsr_fpcr_getter (int unspec, machine_mode mode)
+{
+ rtx target = gen_reg_rtx (mode);
+ emit_insn (gen_aarch64_get (unspec, mode, target));
+ return target;
+}
+
/* Expand an expression EXP that calls built-in function FCODE,
with result going to TARGET if that's convenient. IGNORE is true
if the result of the builtin is ignored. */
@@ -2048,26 +2058,22 @@ aarch64_general_expand_builtin (unsigned int fcode, tree exp, rtx target,
switch (fcode)
{
case AARCH64_BUILTIN_GET_FPCR:
- emit_insn (gen_aarch64_get (UNSPECV_GET_FPCR, SImode, target));
- return target;
+ return aarch64_expand_fpsr_fpcr_getter (UNSPECV_GET_FPCR, SImode);
case AARCH64_BUILTIN_SET_FPCR:
aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPCR, SImode, exp);
return target;
case AARCH64_BUILTIN_GET_FPSR:
- emit_insn (gen_aarch64_get (UNSPECV_GET_FPSR, SImode, target));
- return target;
+ return aarch64_expand_fpsr_fpcr_getter (UNSPECV_GET_FPSR, SImode);
case AARCH64_BUILTIN_SET_FPSR:
aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPSR, SImode, exp);
return target;
case AARCH64_BUILTIN_GET_FPCR64:
- emit_insn (gen_aarch64_get (UNSPECV_GET_FPCR, DImode, target));
- return target;
+ return aarch64_expand_fpsr_fpcr_getter (UNSPECV_GET_FPCR, DImode);
case AARCH64_BUILTIN_SET_FPCR64:
aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPCR, DImode, exp);
return target;
case AARCH64_BUILTIN_GET_FPSR64:
- emit_insn (gen_aarch64_get (UNSPECV_GET_FPSR, DImode, target));
- return target;
+ return aarch64_expand_fpsr_fpcr_getter (UNSPECV_GET_FPSR, DImode);
case AARCH64_BUILTIN_SET_FPSR64:
aarch64_expand_fpsr_fpcr_setter (UNSPECV_SET_FPSR, DImode, exp);
return target;
diff --git a/gcc/testsuite/gcc.target/aarch64/pr96968.c b/gcc/testsuite/gcc.target/aarch64/pr96968.c
new file mode 100644
index 00000000000..21ffd955153
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr96968.c
@@ -0,0 +1,28 @@
+/* { dg-options "-O1" } */
+
+void
+fpsr_getter (void)
+{
+ unsigned int fpsr = __builtin_aarch64_get_fpsr ();
+}
+
+void
+fpsr64_getter (void)
+{
+ unsigned long fpsr = __builtin_aarch64_get_fpsr64 ();
+}
+
+void
+fpcr_getter (void)
+{
+ unsigned int fpcr = __builtin_aarch64_get_fpcr ();
+}
+
+void
+fpcr64_getter (void)
+{
+ unsigned long fpcr = __builtin_aarch64_get_fpcr64 ();
+}
+
+/* { dg-final { scan-assembler-times {\tmrs\tx0, fpsr\n} 2 } } */
+/* { dg-final { scan-assembler-times {\tmrs\tx0, fpcr\n} 2 } } */
--
2.17.1
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