[PATCH] aarch64: Don't generate invalid zero/sign-extend syntax

[Alex Coplan]

Hi Christophe,

> -----Original Message-----
> From: Christophe Lyon <christophe.lyon@linaro.org>
> Sent: 08 September 2020 09:15
> To: Alex Coplan <Alex.Coplan@arm.com>
> Cc: gcc Patches <gcc-patches@gcc.gnu.org>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Marcus Shawcroft <Marcus.Shawcroft@arm.com>
> Subject: Re: [PATCH] aarch64: Don't generate invalid zero/sign-extend
> syntax
> 
> > gcc/ChangeLog:
> >
> >         * config/aarch64/aarch64.md
> >         (*adds_<optab><ALLX:mode>_<GPI:mode>): Ensure extended operand
> >         agrees with width of extension specifier.
> >         (*subs_<optab><ALLX:mode>_<GPI:mode>): Likewise.
> >         (*adds_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise.
> >         (*subs_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise.
> >         (*add_<optab><ALLX:mode>_<GPI:mode>): Likewise.
> >         (*add_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
> >         (*add_uxt<mode>_shift2): Likewise.
> >         (*sub_<optab><ALLX:mode>_<GPI:mode>): Likewise.
> >         (*sub_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
> >         (*sub_uxt<mode>_shift2): Likewise.
> >         (*cmp_swp_<optab><ALLX:mode>_reg<GPI:mode>): Likewise.
> >         (*cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Likewise.
> >
> >
> > gcc/testsuite/ChangeLog:
> >
> >         * gcc.target/aarch64/adds3.c: Fix test w.r.t. new syntax.
> >         * gcc.target/aarch64/cmp.c: Likewise.
> >         * gcc.target/aarch64/subs3.c: Likewise.
> >         * gcc.target/aarch64/subsp.c: Likewise.
> >         * gcc.target/aarch64/extend-syntax.c: New test.
> >
> 
> Hi,
> 
> I've noticed some of the new tests fail with -mabi=ilp32:
>     gcc.target/aarch64/extend-syntax.c check-function-bodies add1
>     gcc.target/aarch64/extend-syntax.c check-function-bodies add3
>     gcc.target/aarch64/extend-syntax.c check-function-bodies sub2
>     gcc.target/aarch64/extend-syntax.c check-function-bodies sub3
>     gcc.target/aarch64/extend-syntax.c scan-assembler-times
> subs\tx[0-9]+, x[0-9]+, w[0-9]+, sxtw 3 1
>     gcc.target/aarch64/subsp.c scan-assembler sub\tsp, sp, w[0-9]*, sxtw
> 4\n

Thanks for catching these.

The failures in extend-syntax.c just need the assertions tweaking, I have a
patch to fix those.

The failure in subsp.c is more interesting: looks like a missed optimisation on
ILP32, I'm taking a look.

> 
> Christophe

Thanks,
Alex