[RS6000] Separate dg-require-effective-target options

[Alan Modra]

Subject was "[RS6000] Tests that use int128_t and -m32"
I meant to make this change before committing too.  Pushed.

	* gcc.target/powerpc/vsx_mask-count-runnable.c: Separate options
	passed to dg-require-effective-target.
	* gcc.target/powerpc/vsx_mask-expand-runnable.c: Likewise.
	* gcc.target/powerpc/vsx_mask-extract-runnable.c: Likewise.
	* gcc.target/powerpc/vsx_mask-move-runnable.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c
index 6aa165c675c..28aa7da9d1f 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c
@@ -1,7 +1,8 @@
 /* { dg-do run { target { power10_hw } } } */
 /* { dg-do link { target { ! power10_hw } } } */
 /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
-/* { dg-require-effective-target { int128 && power10_ok } } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-require-effective-target int128 } */
 
 /* Check that the expected 128-bit instructions are generated if the processor
    supports the 128-bit integer instructions. */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c
index 9fdfa4a8b82..68c1c3f1c9a 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c
@@ -1,7 +1,8 @@
 /* { dg-do run { target { power10_hw } } } */
 /* { dg-do link { target { ! power10_hw } } } */
 /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
-/* { dg-require-effective-target { int128 && power10_ok } } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-require-effective-target int128 } */
 
 /* Check that the expected 128-bit instructions are generated if the processor
    supports the 128-bit integer instructions. */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c
index a038e56c9cd..4664807a69e 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c
@@ -1,7 +1,8 @@
 /* { dg-do run { target { power10_hw } } } */
 /* { dg-do link { target { ! power10_hw } } } */
 /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
-/* { dg-require-effective-target { int128 && power10_ok } } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-require-effective-target int128 } */
 
 /* Check that the expected 128-bit instructions are generated if the processor
    supports the 128-bit integer instructions. */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c
index 6f87e60ea41..58954dc5fc9 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c
@@ -1,7 +1,8 @@
 /* { dg-do run { target { power10_hw } } } */
 /* { dg-do link { target { ! power10_hw } } } */
 /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
-/* { dg-require-effective-target { int128 && power10_ok } } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-require-effective-target int128 } */
 
 /* Check that the expected 128-bit instructions are generated if the processor
    supports the 128-bit integer instructions. */


-- 
Alan Modra
Australia Development Lab, IBM