[PATCH][GCC] arm: Fix the warning -mcpu=cortex-m55 conflicting with -march=armv8.1-m.main (pr97327).

Srinath Parvathaneni srinath.parvathaneni@arm.com
Fri Oct 16 13:21:28 GMT 2020


Hello,

This patch fixes (PR97327) the warning -mcpu=cortex-m55 conflicts with -march=armv8.1-m.main
for -mfloat-abi=soft by adding the isa_bit_mve_float to clearing FP bit list.

The following combination are fixed with this patch:
$ cat bug.c
int main(){
return 0;
}

$ arm-none-eabi-gcc -mcpu=cortex-m55 -mfloat-abi=soft bug.c -c
$ arm-none-eabi-gcc -mcpu=cortex-m55 -mfloat-abi=soft -march=armv8.1-m.main+mve bug.c -c

Before this patch for above combinations:
cc1: warning: switch '-mcpu=cortex-m55' conflicts with '-march=armv8.1-m.main' switch

After this patch for above combinations no warning/errors.

Regression tested on arm-none-eabi and found no regressions.

Ok for master? Ok for GCC-10 branch?

Regards,
Srinath.

gcc/ChangeLog:

2020-10-16  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	PR target/97327
	* config/arm/arm.c (fp_bitlist): Add isa_bit_mve_float to FP bits array.

gcc/testsuite/ChangeLog:

	PR target/97327
	* gcc.target/arm/mve/intrinsics/pr97327.c: New test.


###############     Attachment also inlined for ease of reply    ###############


diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 0b8c5fa074d32e9ced107d1917323479c19d4c4e..dfadaca6fdfe16cfd5b6531ae8564d01063bbe77 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3429,8 +3429,9 @@ arm_option_override (void)
 {
   static const enum isa_feature fpu_bitlist_internal[]
     = { ISA_ALL_FPU_INTERNAL, isa_nobit };
+  /* isa_bit_mve_float is also part of FP bit list for arch v8.1-m.main.  */
   static const enum isa_feature fp_bitlist[]
-    = { ISA_ALL_FP, isa_nobit };
+    = { ISA_ALL_FP, isa_bit_mve_float, isa_nobit };
   static const enum isa_feature quirk_bitlist[] = { ISA_ALL_QUIRKS, isa_nobit};
   cl_target_option opts;
 
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c
new file mode 100644
index 0000000000000000000000000000000000000000..8f6d36063811607623048c0a95920b29e43f4c39
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c
@@ -0,0 +1,8 @@
+/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
+/* { dg-additional-options "-mcpu=cortex-m55 -mfloat-abi=soft -mfpu=auto -Werror" } */
+
+int main ()
+{
+  return 0;
+}

-------------- next part --------------
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 0b8c5fa074d32e9ced107d1917323479c19d4c4e..dfadaca6fdfe16cfd5b6531ae8564d01063bbe77 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3429,8 +3429,9 @@ arm_option_override (void)
 {
   static const enum isa_feature fpu_bitlist_internal[]
     = { ISA_ALL_FPU_INTERNAL, isa_nobit };
+  /* isa_bit_mve_float is also part of FP bit list for arch v8.1-m.main.  */
   static const enum isa_feature fp_bitlist[]
-    = { ISA_ALL_FP, isa_nobit };
+    = { ISA_ALL_FP, isa_bit_mve_float, isa_nobit };
   static const enum isa_feature quirk_bitlist[] = { ISA_ALL_QUIRKS, isa_nobit};
   cl_target_option opts;
 
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c
new file mode 100644
index 0000000000000000000000000000000000000000..8f6d36063811607623048c0a95920b29e43f4c39
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c
@@ -0,0 +1,8 @@
+/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=hard" } { "" } } */
+/* { dg-additional-options "-mcpu=cortex-m55 -mfloat-abi=soft -mfpu=auto -Werror" } */
+
+int main ()
+{
+  return 0;
+}



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