[PATCH] rs6000, vector integer multiply/divide/modulo instructions

[David Edelsohn]

On Wed, Nov 4, 2020 at 11:44 AM Carl Love <cel@us.ibm.com> wrote:
>
> David:
>
> I have reworked the patch moving the new vector instruction patterns to
> vsx.md.  Also, cleaned up the vector division instructions.  The
> div<mode>3 pattern definitions are the only ones that should be
> defined.
>
> I have retested the patch on:
>
>    powerpc64le-unknown-linux-gnu (Power 9 LE)
>
> with no regressions. Additionally the new test case was compiled and
> executed by hand on Mambo to verify the test case passes.
>
> Please let me know if this patch is acceptable for mainline.  Thanks.
>
>                 Carl Love
>
> --------------------------------------------------------------
>
> 2020-11-02  Carl Love  <cel@us.ibm.com>
>
> gcc/
>         * config/rs6000/altivec.h (vec_mulh, vec_div, vec_dive, vec_mod): New
>         defines.
>         * config/rs6000/altivec.md (VIlong): Move define to file vsx.md.
>         * config/rs6000/rs6000-builtin.def (VDIVES_V4SI, VDIVES_V2DI,
>         VDIVEU_V4SI, VDIVEU_V2DI, VDIVS_V4SI, VDIVS_V2DI, VDIVU_V4SI,
>         VDIVU_V2DI, VMODS_V2DI, VMODS_V4SI, VMODU_V2DI, VMODU_V4SI,
>         VMULHS_V2DI, VMULHS_V4SI, VMULHU_V2DI, VMULHU_V4SI, VMULLD_V2DI):
>         Add builtin define.
>         (VMUL, VMULH, VDIVE, VMOD):  Add new BU_P10_OVERLOAD_2 definitions.
>         * config/rs6000/rs6000-call.c (VSX_BUILTIN_VEC_DIV,
>         P10_BUILTIN_VEC_VDIVE, P10_BUILTIN_VEC_VMOD, P10_BUILTIN_VEC_VMULH):
>         New overloaded definitions.
>         (builtin_function_type) [P10V_BUILTIN_VDIVEU_V4SI,
>         P10V_BUILTIN_VDIVEU_V2DI, P10V_BUILTIN_VDIVU_V4SI,
>         P10V_BUILTIN_VDIVU_V2DI, P10V_BUILTIN_VMODU_V2DI,
>         P10V_BUILTIN_VMODU_V4SI, P10V_BUILTIN_VMULHU_V2DI,
>         P10V_BUILTIN_VMULHU_V4SI, P10V_BUILTIN_VMULLD_V2DI]: Add case
>         statement for builtins.
>         * config/rs6000/vsx.md (VIlong_char): Add define_mod_attribute.
>         (UNSPEC_VDIVES, UNSPEC_VDIVEU,
>         UNSPEC_VMULHS, UNSPEC_VMULHU, UNSPEC_VMULLD): Add enum for UNSPECs.
>         (vsx_mul_v2di, vsx_udiv_v2di): Add if TARGET_POWER10 statement.
>         (vdives_<mode>, vdiveu_<mode>, vdiv<mode>3, uuvdiv<mode>3,
>         vmods_<mode>, vmodu_<mode>, vmulhs_<mode>, vmulhu_<mode>, mulv2di3):
>         Add define_insn, mode is VIlong.
>         * doc/extend.texi (vec_mulh, vec_mul, vec_div, vec_dive, vec_mod): Add
>         builtin descriptions.
>
> gcc/testsuite/
>         * gcc.target/powerpc/builtins-1-p10-runnable.c: New test file.

Hi, Carl

Thanks for making the changes.  This looks okay to me now.  I don't
know if Segher has any additional requests.

Thanks, David