[PATCH] RISC-V: Disallow regrenme if the TO register never used before for interrupt functions

[Kito Cheng]

Hi Jim:

Thanks, fixed and committed, and it's OK to commit to gcc 8/9 next week?

On Tue, Jan 21, 2020 at 7:13 AM Jim Wilson <jimw@sifive.com> wrote:

> On Mon, Jan 20, 2020 at 12:04 AM Kito Cheng <kito.cheng@sifive.com> wrote:
> > gcc/ChangeLog
> >
> >         PR target/93304
> >         * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
> >         * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
> >         * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
> >
> > gcc/testsuite/ChangeLog
> >
> >         PR target/93304
> >         * gcc.target/riscv/pr93304.c: New test.
>
> OK.
>
> By the way, you don't need blank lines after the PR target/93304.
>
> Jim
>