[PATCH], PR target/93932, GCC 9 backport, Do not use input_operand for variable vector extract insns on PowerPC

[Michael Meissner]

On Thu, Feb 27, 2020 at 04:57:28PM -0600, Segher Boessenkool wrote:
> Hi,
> 
> On Thu, Feb 27, 2020 at 03:38:54PM -0500, Michael Meissner wrote:
> > Here are the equivalent changes for PR target/93932 for the GCC 9 branch.  I
> > have built both big and little endian PowerPC linux compilers and both
> > bootstrapped.  The make check actually fixes the tests that were broken by the
> > register allocation behavior.  Can I check these patches into GCC 9?
> 
> So what is different in this backport?
> 
> Either way, it needs some soaking time first.  This patch is not much
> safer than average.

Fair enough.

The difference is GCC 9 has all of the old constraints that were eliminated in
the current master branch.

I.e. the first patch for the current master, uses "wa" for the second
constraint, while GCC 9 used "<VSa>" (which in GCC 9 expanded to "wa" in both
cases).  Here is the patch from the master branch.

--- /tmp/TMHdwO_vsx.md	2020-02-26 13:25:27.250209645 -0500
+++ gcc/config/rs6000/vsx.md	2020-02-26 13:25:21.357125563 -0500
@@ -3245,14 +3245,14 @@ (define_insn "vsx_vslo_<mode>"
   "vslo %0,%1,%2"
   [(set_attr "type" "vecperm")])
 
-;; Variable V2DI/V2DF extract
+;; Variable V2DI/V2DF extract from a register
 (define_insn_and_split "vsx_extract_<mode>_var"
-  [(set (match_operand:<VS_scalar> 0 "gpc_reg_operand" "=v,wa,r")
-	(unspec:<VS_scalar> [(match_operand:VSX_D 1 "input_operand" "v,Q,Q")
-			     (match_operand:DI 2 "gpc_reg_operand" "r,r,r")]
+  [(set (match_operand:<VS_scalar> 0 "gpc_reg_operand" "=v")
+	(unspec:<VS_scalar> [(match_operand:VSX_D 1 "gpc_reg_operand" "v")
+			     (match_operand:DI 2 "gpc_reg_operand" "r")]
 			    UNSPEC_VSX_EXTRACT))
-   (clobber (match_scratch:DI 3 "=r,&b,&b"))
-   (clobber (match_scratch:V2DI 4 "=&v,X,X"))]
+   (clobber (match_scratch:DI 3 "=r"))
+   (clobber (match_scratch:V2DI 4 "=&v"))]
   "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_DIRECT_MOVE_64BIT"
   "#"
   "&& reload_completed"

while the patch for GCC 9 is:

--- /tmp/E213hs_vsx.md	2020-02-26 16:55:13.792745200 -0500
+++ gcc/config/rs6000/vsx.md	2020-02-26 16:50:50.614817018 -0500
@@ -3292,14 +3292,14 @@ (define_insn "vsx_vslo_<mode>"
   "vslo %0,%1,%2"
   [(set_attr "type" "vecperm")])
 
-;; Variable V2DI/V2DF extract
+;; Variable V2DI/V2DF extract from a register
 (define_insn_and_split "vsx_extract_<mode>_var"
-  [(set (match_operand:<VS_scalar> 0 "gpc_reg_operand" "=v,<VSa>,r")
-	(unspec:<VS_scalar> [(match_operand:VSX_D 1 "input_operand" "v,Q,Q")
-			     (match_operand:DI 2 "gpc_reg_operand" "r,r,r")]
+  [(set (match_operand:<VS_scalar> 0 "gpc_reg_operand" "=v")
+	(unspec:<VS_scalar> [(match_operand:VSX_D 1 "gpc_reg_operand" "v")
+			     (match_operand:DI 2 "gpc_reg_operand" "r")]
 			    UNSPEC_VSX_EXTRACT))
-   (clobber (match_scratch:DI 3 "=r,&b,&b"))
-   (clobber (match_scratch:V2DI 4 "=&v,X,X"))]
+   (clobber (match_scratch:DI 3 "=r"))
+   (clobber (match_scratch:V2DI 4 "=&v"))]
   "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_DIRECT_MOVE_64BIT"
   "#"
   "&& reload_completed"

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797