[Ping][PATCH][Arm] ACLE intrinsics for AdvSIMD bfloat16 dot product

[Dennis Zhang]

Hi Kyrill,

On 25/02/2020 12:18, Kyrill Tkachov wrote:
> Hi Dennis,
> 
> On 2/25/20 11:54 AM, Dennis Zhang wrote:
>> Hi all,
>>
>> On 07/01/2020 12:12, Dennis Zhang wrote:
>> > Hi all,
>> >
>> > This patch is part of a series adding support for Armv8.6-A features.
>> > It depends on the patch enabling Arm BFmode
>> > https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01448.html
>> >
>> > This patch adds intrinsics for brain half-precision float-point dot
>> > product.
>> > ACLE documents are at https://developer.arm.com/docs/101028/latest
>> > ISA documents are at https://developer.arm.com/docs/ddi0596/latest
>> >
>> > Regression tested for arm-none-linux-gnueabi-armv8-a.
>> >
>> > Is it OK for trunk please?
>> >
>> > Thanks,
>> > Dennis
>> >
>> > gcc/ChangeLog:
>> >
>> > 2020-01-03  Dennis Zhang  <dennis.zhang@arm.com>
>> >
>> >Â  Â Â Â Â * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
>> >Â  Â Â Â Â (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
>> >Â  Â Â Â Â (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
>> >Â  Â Â Â Â * config/arm/arm_neon_builtins.def (vbfdot): New.
>> >Â  Â Â Â Â (vbfdot_lanev4bf, vbfdot_lanev8bf): New.
>> >Â  Â Â Â Â * config/arm/iterators.md (VSF2BF): New mode attribute.
>> >Â  Â Â Â Â * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New.
>> >Â  Â Â Â Â (neon_vbfdot_lanev4bf<VCVTF:mode>): New.
>> >Â  Â Â Â Â (neon_vbfdot_lanev8bf<VCVTF:mode>): New.
>> >
>> > gcc/testsuite/ChangeLog:
>> >
>> > 2020-01-03  Dennis Zhang  <dennis.zhang@arm.com>
>> >
>> >Â  Â Â Â Â * gcc.target/arm/simd/bf16_dot_1.c: New test.
>> >Â  Â Â Â Â * gcc.target/arm/simd/bf16_dot_2.c: New test.
>> >
>>
>> This patch updates tests in bf16_dot_1.c to make proper assembly check.
>> Is it OK for trunk, please?
>>
>> Cheers
>> Dennis
> 
> Looks ok but...
> 
> 
> new file mode 100644
> index 00000000000..c533f9d0b2f
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arm/simd/bf16_dot_2.c
> @@ -0,0 +1,29 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
> +/* { dg-add-options arm_v8_2a_bf16_neon } */
> +
> +#include "arm_neon.h"
> +
> +float32x2_t
> +test_vbfdot_lane_f32 (float32x2_t r, bfloat16x4_t a, bfloat16x4_t b)
> +{
> +Â  return __builtin_neon_vbfdot_lanev4bfv2sf (r, a, b, 2); /* { dg-error 
> {out of range 0 - 1} } */
> +}
> +
> +float32x4_t
> +test_vbfdotq_lane_f32 (float32x4_t r, bfloat16x8_t a, bfloat16x4_t b)
> +{
> +Â  return __builtin_neon_vbfdot_lanev4bfv4sf (r, a, b, 2); /* { dg-error 
> {out of range 0 - 1} } */
> +}
> +
> +float32x2_t
> +test_vbfdot_laneq_f32 (float32x2_t r, bfloat16x4_t a, bfloat16x8_t b)
> +{
> +Â  return __builtin_neon_vbfdot_lanev8bfv2sf (r, a, b, 4); /* { dg-error 
> {out of range 0 - 3} } */
> +}
> +
> +float32x4_t
> +test_vbfdotq_laneq_f32 (float32x4_t r, bfloat16x8_t a, bfloat16x8_t b)
> +{
> +Â  return __builtin_neon_vbfdot_lanev8bfv4sf (r, a, b, 4); /* { dg-error 
> {out of range 0 - 3} } */
> +}
> 
> These  tests shouldn't be calling the __builtin* directly, they are just 
> an implementation detail.
> What we want to test is the intrinsic itself.
> Thanks,
> Kyrill
> 

Many thanks for the review.
The issue is fixed in the updated patch.
Is it ready please?

Dennis
Cheers

gcc/ChangeLog:

2020-02-25  Dennis Zhang  <dennis.zhang@arm.com>

	* config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
	(vbfdot_lane_f32, vbfdotq_laneq_f32): New.
	(vbfdot_laneq_f32, vbfdotq_lane_f32): New.
	* config/arm/arm_neon_builtins.def (vbfdot): New entry.
	(vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
	* config/arm/iterators.md (VSF2BF): New attribute.
	* config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
	(neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
	(neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.

gcc/testsuite/ChangeLog:

2020-02-25  Dennis Zhang  <dennis.zhang@arm.com>

	* gcc.target/arm/simd/bf16_dot_1.c: New test.
	* gcc.target/arm/simd/bf16_dot_2.c: New test.
	* gcc.target/arm/simd/bf16_dot_3.c: New test.
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