[PATCH] rs6000: Fix broken gcc.target/powerpc/fold-vec-st-*.c test cases [PR93913]

[Peter Bergner]

POWER9 added the stxv instruction, which is d-form store.  When we compile
the FAILing test cases in PR93913 when -mcpu=power9 is the default, then
we may sometimes get stxv rather than stvx generated.  The fix here is
to allow both mnemonics when counting.

Ok for trunk and GCC 9, where these are FAILing now?

Peter

	PR target/93913
	* gcc.target/powerpc/fold-vec-st-char.c (scan-assembler-times): Allow
	stxv instruction as well.
	* gcc.target/powerpc/fold-vec-st-float.c: Likewise.
	* gcc.target/powerpc/fold-vec-st-int.c: Likewise.
	* gcc.target/powerpc/fold-vec-st-short.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-st-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-st-char.c
index 4c4582780c2..61cd9462346 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-st-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-st-char.c
@@ -91,4 +91,4 @@ testst_cst7 (vector bool char vbc1, int i1, signed char * vscp)
 	return vec_st(vbc1, 36, vscp);
 }
 
-/* { dg-final { scan-assembler-times {\mstvx\M} 14 } } */
+/* { dg-final { scan-assembler-times {\mstvx|stxv\M} 14 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-st-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-st-float.c
index 5a8fc6670a6..408555b0b62 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-st-float.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-st-float.c
@@ -31,4 +31,4 @@ testst_cst2 (vector float vf1, int i1, float * fp)
 	return vec_st(vf1, 24, fp);
 }
 
-/* { dg-final { scan-assembler-times {\mstvx\M}  4 } } */
+/* { dg-final { scan-assembler-times {\mstvx|stxv\M} 4 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-st-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-st-int.c
index 4db35f0dd94..4bb504d6caf 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-st-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-st-int.c
@@ -80,5 +80,5 @@ testst_cst7 (vector bool int vbi1, int i1, signed int * vsip)
 	return vec_st(vbi1, 36, vsip);
 }
 
-/* { dg-final { scan-assembler-times {\mstvx\M}  14 } } */
+/* { dg-final { scan-assembler-times {\mstvx|stxv\M} 14 } } */
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-st-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-st-short.c
index ba8397eef26..b1f58d865cf 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-st-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-st-short.c
@@ -80,4 +80,4 @@ testst_cst7 (vector bool short vbs1, int i1, signed short * vssp)
 	return vec_st(vbs1, 36, vssp);
 }
 
-/* { dg-final { scan-assembler-times {\mstvx\M} 14} } */
+/* { dg-final { scan-assembler-times {\mstvx|stxv\M} 14} } */