[PATCH] fix testcase gcc.target/aarch64/insv_1.c
Richard Sandiford
richard.sandiford@arm.com
Thu Aug 27 08:01:53 GMT 2020
"Qian, Jianhua" <qianjh@cn.fujitsu.com> writes:
> Hi Richard
>
> I found that some instructions are using '#' before immediate value,
> and others are not. For example
> (define_insn "insv_imm<mode>"
> [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r")
> (const_int 16)
> (match_operand:GPI 1 "const_int_operand" "n"))
> (match_operand:GPI 2 "const_int_operand" "n"))]
> "UINTVAL (operands[1]) < GET_MODE_BITSIZE (<MODE>mode)
> && UINTVAL (operands[1]) % 16 == 0"
> "movk\\t%<w>0, %X2, lsl %1"
> [(set_attr "type" "mov_imm")]
> )
>
> Are there any standards for this?
No, it's unfortunately inconsistent. FWIW, if we were going to change this,
personally I've a slight preference for having the “#”.
Thanks,
Richard
>
> Regards
> Qian
>
> -----Original Message-----
> From: Richard Sandiford <richard.sandiford@arm.com>
> Sent: Wednesday, August 26, 2020 6:09 PM
> To: Qian, Jianhua/钱 建华 <qianjh@cn.fujitsu.com>
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH] fix testcase gcc.target/aarch64/insv_1.c
>
> Qian Jianhua <qianjh@cn.fujitsu.com> writes:
>> There are three failures in gcc.target/aarch64/insv_1.c.
>> FAIL: gcc.target/aarch64/insv_1.c scan-assembler bfi\tx[0-9]+,
>> x[0-9]+, 0, 8
>> FAIL: gcc.target/aarch64/insv_1.c scan-assembler bfi\tx[0-9]+,
>> x[0-9]+, 16, 5
>> FAIL: gcc.target/aarch64/insv_1.c scan-assembler movk\tx[0-9]+,
>> 0x1d6b, lsl 32
>>
>> This patch fix the third failure which was missed "#" before immediate
>> value in scan-assembler.
>
> Thanks, pushed to master.
>
> Richard
>
>> gcc/testsuite/ChangeLog:
>>
>> * gcc.target/aarch64/insv_1.c: Add '#' in scan-assembler
>>
>> ---
>> gcc/testsuite/gcc.target/aarch64/insv_1.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/gcc/testsuite/gcc.target/aarch64/insv_1.c
>> b/gcc/testsuite/gcc.target/aarch64/insv_1.c
>> index 360a9892ad9..9efa22e649d 100644
>> --- a/gcc/testsuite/gcc.target/aarch64/insv_1.c
>> +++ b/gcc/testsuite/gcc.target/aarch64/insv_1.c
>> @@ -32,7 +32,7 @@ bfi2 (bitfield a)
>> bitfield
>> movk (bitfield a)
>> {
>> - /* { dg-final { scan-assembler "movk\tx\[0-9\]+, 0x1d6b, lsl 32" }
>> } */
>> + /* { dg-final { scan-assembler "movk\tx\[0-9\]+, #0x1d6b, lsl 32" }
>> + } */
>> a.sixteen = 7531;
>> return a;
>> }
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