[PATCH] AArch64: Add if condition in aarch64_function_value [PR96479]

qiaopeixin qiaopeixin@huawei.com
Thu Aug 13 01:54:27 GMT 2020


Thanks for the review and commit.

All the best,
Peixin

-----Original Message-----
From: Richard Sandiford [mailto:richard.sandiford@arm.com] 
Sent: 2020年8月13日 0:25
To: qiaopeixin <qiaopeixin@huawei.com>
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] AArch64: Add if condition in aarch64_function_value [PR96479]

qiaopeixin <qiaopeixin@huawei.com> writes:
> Hi,
>
> The test case vector-subscript-2.c in the gcc testsuit will report an ICE in the expand pass since '-mgeneral-regs-only' is incompatible with the use of V4SI mode. I propose to report the diagnostic information instead of ICE, and the problem has been discussed on PR 96479.
>
> I attached the patch to solve the problem. Bootstrapped and tested on aarch64-linux-gnu. Any suggestions?

Thanks, pushed.  I was initially sceptical because raising an error here and in aarch64_layout_arg is a hack.  Both functions are just query functions and shouldn't have any side effects.

The approach we took for FP modes seemed better: we define the FP move patterns unconditionally, and raise an error if we try to emit an FP move with !TARGET_FLOAT.  This defers any error reporting until we actually try to generate code that depends on TARGET_FLOAT.

But I guess SIMD stuff is different.  There's no reason in principle why you can't use:

  unsigned short __attribute__((vector_size(8)))

*within* a function with -mgeneral-regs-only.  It would just need to be emulated, in the same way as for:

  unsigned short __attribute__((vector_size(4)))

So it would be wrong to define the SIMD move patterns unconditionally and raise an error there.

So all in all, I agree this is the best we can do given the current infrastructure.

Thanks,
Richard



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