[PATCH] cmpelim: recognize extra clobbers in insns

Pip Cet pipcet@gmail.com
Thu Aug 6 12:42:01 GMT 2020

I'm working on the AVR cc0 -> CCmode conversion (bug#92729). One
problem is that the cmpelim pass is currently very strict in requiring
insns of the form

(parallel [(set (reg:SI) (op:SI ... ...))
           (clobber (reg:CC REG_CC))])

when in fact AVR's insns often have the form

(parallel [(set (reg:SI) (op:SI ... ...))
           (clobber (scratch:QI))
           (clobber (reg:CC REG_CC))])

The attached patch relaxes checks in the cmpelim code to recognize
such insns, and makes it attempt to recognize

(parallel [(set (reg:CC REG_CC) (compare:CC ... ...))
           (set (reg:SI (op:SI ... ...)))
       (clobber (scratch:QI))])

as a new insn for that example. This appears to work.

I've bootstrapped and run the test suite with the patch, without differences.
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