[PATCH] emit-rtl.c: Allow vector subreg of float vectors
Thu Aug 6 03:54:31 GMT 2020
Andrew Stubbs <email@example.com> writes:
> This patch is a prerequisite for some patches I have to add multiple
> vector sizes on amdgcn.
> The problem is that validate_subreg rejects things like this:
> (subreg:V32SF (reg:V64SF) 0)
> These are commonly generated by the compiler. The integer equivalents
> work fine.
> To be honest, I don't know why other targets have not encountered this
> problem before? Perhaps because most other targets require all vectors
> to have the same number of bits, meaning that float vectors have a fixed
> number of lanes? In my case, amdgcn can convert V64SFmode to V32SFmode
> by simply masking off some lanes.
> OK to commit? (I have an x86_64 bootstrap and test in progress.)
> Allow vector subreg of float vectors
> Integer vector subregs were already permitted.
> * emit-rtl.c (validate_subreg): Permit sections of float vectors.
> diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
> index f9b0e9714d9..d7067989ad7 100644
> --- a/gcc/emit-rtl.c
> +++ b/gcc/emit-rtl.c
> @@ -947,6 +947,11 @@ validate_subreg (machine_mode omode, machine_mode imode,
> else if (VECTOR_MODE_P (omode)
> && GET_MODE_INNER (omode) == GET_MODE_INNER (imode))
> + /* Allow sections of vectors, both smaller and paradoxical. (This just
> + works for integers, but needs to be explicitly allowed for floats.) */
> + else if (VECTOR_MODE_P (omode) && VECTOR_MODE_P (imode)
> + && GET_MODE_INNER (omode) == GET_MODE_INNER (imode))
> + ;
Might be missing something, but isn't this a subcondition of the
previous “else if”? It looks like that ought to catch every case
that the new one does.
> /* Subregs involving floating point modes are not allowed to
> change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
> (subreg:SI (reg:DF) 0) isn't. */
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