[PATCH], PR target/94557, V2, Fix GCC 9.x PowerPC regression due to PR target/93932 back port.

will schmidt will_schmidt@vnet.ibm.com
Thu Apr 16 15:17:30 GMT 2020


On Wed, 2020-04-15 at 21:37 -0400, Michael Meissner via Gcc-patches wrote:
> Fix regression caused by PR target/93932 backport.
> 
> When I back ported the fix for PR target/93932 to the GCC 9 branch, I put in an
> unintended regression when the GCC compiler is optimizing the vec_extract
> built-in function, and the vector element is in memory, and the index is
> variable.  This patch masks the vector index so that it does not go out of
> bounds.

Regression tested OK, I assume. :-)


> 
> 2020-04-15  Michael Meissner  <meissner@linux.ibm.com>
> 
> 	PR target/94557
> 	* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Fix
> 	regression caused by PR target/93932 backport.  Mask variable
> 	vector extract index so it does not go beyond the vector when
> 	extracting a vector element from memory.
> 


ok

> --- /tmp/4XFFqK_rs6000.c	2020-04-13 15:28:33.514011024 -0500
> +++ gcc/config/rs6000/rs6000.c	2020-04-13 14:24:01.296932921 -0500
> @@ -7047,18 +7047,25 @@ rs6000_adjust_vec_address (rtx scalar_re
>      element_offset = GEN_INT (INTVAL (element) * scalar_size);
>    else
>      {
> +      /* Mask the element to make sure the element number is between 0 and the
> +	 maximum number of elements - 1 so that we don't generate an address
> +	 outside the vector.  */
> +      rtx num_ele_m1 = GEN_INT (GET_MODE_NUNITS (GET_MODE (mem)) - 1);
> +      rtx and_op = gen_rtx_AND (Pmode, element, num_ele_m1);
> +      emit_insn (gen_rtx_SET (base_tmp, and_op));
> +
>        int byte_shift = exact_log2 (scalar_size);
>        gcc_assert (byte_shift >= 0);
> 
>        if (byte_shift == 0)
> -	element_offset = element;
> +	element_offset = base_tmp;
> 
>        else
>  	{
>  	  if (TARGET_POWERPC64)
> -	    emit_insn (gen_ashldi3 (base_tmp, element, GEN_INT (byte_shift)));
> +	    emit_insn (gen_ashldi3 (base_tmp, base_tmp, GEN_INT (byte_shift)));
>  	  else
> -	    emit_insn (gen_ashlsi3 (base_tmp, element, GEN_INT (byte_shift)));
> +	    emit_insn (gen_ashlsi3 (base_tmp, base_tmp, GEN_INT (byte_shift)));

ok

> 
>  	  element_offset = base_tmp;
>  	}
> 

Below matches the above, looks like the patch is double-pasted into the
email, not a big deal.

lgtm.

thanks,
-Will

> --- /tmp/4XFFqK_rs6000.c	2020-04-13 15:28:33.514011024 -0500
> +++ gcc/config/rs6000/rs6000.c	2020-04-13 14:24:01.296932921 -0500
> @@ -7047,18 +7047,25 @@ rs6000_adjust_vec_address (rtx scalar_re
>      element_offset = GEN_INT (INTVAL (element) * scalar_size);
>    else
>      {
> +      /* Mask the element to make sure the element number is between 0 and the
> +	 maximum number of elements - 1 so that we don't generate an address
> +	 outside the vector.  */
> +      rtx num_ele_m1 = GEN_INT (GET_MODE_NUNITS (GET_MODE (mem)) - 1);
> +      rtx and_op = gen_rtx_AND (Pmode, element, num_ele_m1);
> +      emit_insn (gen_rtx_SET (base_tmp, and_op));
> +
>        int byte_shift = exact_log2 (scalar_size);
>        gcc_assert (byte_shift >= 0);
> 
>        if (byte_shift == 0)
> -	element_offset = element;
> +	element_offset = base_tmp;
> 
>        else
>  	{
>  	  if (TARGET_POWERPC64)
> -	    emit_insn (gen_ashldi3 (base_tmp, element, GEN_INT (byte_shift)));
> +	    emit_insn (gen_ashldi3 (base_tmp, base_tmp, GEN_INT (byte_shift)));
>  	  else
> -	    emit_insn (gen_ashlsi3 (base_tmp, element, GEN_INT (byte_shift)));
> +	    emit_insn (gen_ashlsi3 (base_tmp, base_tmp, GEN_INT (byte_shift)));
> 
>  	  element_offset = base_tmp;
>  	}
> 



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