[PATCH, AArch64 v4 0/6] LSE atomics out-of-line

Kyrill Tkachov kyrylo.tkachov@foss.arm.com
Wed Sep 18 12:58:00 GMT 2019


Hi Richard,

On 9/18/19 2:58 AM, Richard Henderson wrote:
> Version 3 was back in November:
> https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00062.html
>
> Changes since v3:
>    * Do not swap_commutative_operands_p in aarch64_gen_compare_reg.
>      This is the probable cause of the bootstrap problem that Kyrill reported.
>    * Add unwind markers to the out-of-line functions.
>    * Use uxt{8,16} instead of mov in CAS functions,
>      in preference to including the uxt with the cmp.
>    * Prefer the lse case in the out-of-line fallthru (Wilco).
>    * Name the option -moutline-atomics (Wilco)
>    * Name the variable __aarch64_have_lse_atomics (Wilco);
>      fix the definition in lse-init.c.
>    * Rename the functions s/__aa64/__aarch64/ (Seemed sensible to match prev)
>    * Always use Pmode for the address for libcalls, fixing ilp32 (Kyrill).
>
> Still not done is a custom calling convention during code generation,
> but that can come later as an optimization.
>
> Tested aarch64-linux on a thunder x1.
> I have not run tests on any platform supporting LSE, even qemu.
>
Thanks for this.

I've bootstrapped and tested this patch series on systems with and 
without LSE support, both with and without patch [6/6], so 4 setups in 
total.

It all looks clean for me.

I'm favour of this series going in (modulo patch 6/6, leaving the option 
to turn it on to the user).

I've got a couple of small comments on some of the patches that IMO can 
be fixed when committing.

I'll respond to them individually.

Thanks,

Kyrill

> r~
>
>
> Richard Henderson (6):
>    aarch64: Extend %R for integer registers
>    aarch64: Implement TImode compare-and-swap
>    aarch64: Tidy aarch64_split_compare_and_swap
>    aarch64: Add out-of-line functions for LSE atomics
>    aarch64: Implement -moutline-atomics
>    TESTING: Enable -moutline-atomics by default
>
>   gcc/config/aarch64/aarch64-protos.h           |  13 +
>   gcc/common/config/aarch64/aarch64-common.c    |   6 +-
>   gcc/config/aarch64/aarch64.c                  | 204 +++++++++++----
>   .../atomic-comp-swap-release-acquire.c        |   2 +-
>   .../gcc.target/aarch64/atomic-op-acq_rel.c    |   2 +-
>   .../gcc.target/aarch64/atomic-op-acquire.c    |   2 +-
>   .../gcc.target/aarch64/atomic-op-char.c       |   2 +-
>   .../gcc.target/aarch64/atomic-op-consume.c    |   2 +-
>   .../gcc.target/aarch64/atomic-op-imm.c        |   2 +-
>   .../gcc.target/aarch64/atomic-op-int.c        |   2 +-
>   .../gcc.target/aarch64/atomic-op-long.c       |   2 +-
>   .../gcc.target/aarch64/atomic-op-relaxed.c    |   2 +-
>   .../gcc.target/aarch64/atomic-op-release.c    |   2 +-
>   .../gcc.target/aarch64/atomic-op-seq_cst.c    |   2 +-
>   .../gcc.target/aarch64/atomic-op-short.c      |   2 +-
>   .../aarch64/atomic_cmp_exchange_zero_reg_1.c  |   2 +-
>   .../atomic_cmp_exchange_zero_strong_1.c       |   2 +-
>   .../gcc.target/aarch64/sync-comp-swap.c       |   2 +-
>   .../gcc.target/aarch64/sync-op-acquire.c      |   2 +-
>   .../gcc.target/aarch64/sync-op-full.c         |   2 +-
>   libgcc/config/aarch64/lse-init.c              |  45 ++++
>   gcc/config/aarch64/aarch64.opt                |   3 +
>   gcc/config/aarch64/atomics.md                 | 187 +++++++++++++-
>   gcc/config/aarch64/iterators.md               |   3 +
>   gcc/doc/invoke.texi                           |  16 +-
>   libgcc/config.host                            |   4 +
>   libgcc/config/aarch64/lse.S                   | 235 ++++++++++++++++++
>   libgcc/config/aarch64/t-lse                   |  44 ++++
>   28 files changed, 709 insertions(+), 85 deletions(-)
>   create mode 100644 libgcc/config/aarch64/lse-init.c
>   create mode 100644 libgcc/config/aarch64/lse.S
>   create mode 100644 libgcc/config/aarch64/t-lse
>



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