[PATCH] Fix PR 91708

[Jeff Law]

On 9/11/19 10:38 AM, Wilco Dijkstra wrote:
> Hi Jeff,
> 
> Jeff wrote:
>> Just to make sure I understand.  Are you saying the addresses for the
>> MEMs are equal or the contents of the memory location are equal.
>>
>> For the former the alignment has to be the same, plain and simple, even
>> if GCC isn't aware the alignments have to be the same.
>>
>> For the latter we'd be better off loading the data into a REG, then
>> using the REG for the source of both memory stores.
> 
> The addresses are the same (they should probably have been canonicalized
> earlier, that might be a separate bug). I'm not sure why the unaligned stores
> have a lower alignment/no alias set, but it's certainly possible that a memset
> expansion of a subfield of a structure has a lower alignment.
> 
> The known alignment of otherwise identical loads in different blocks could be
> different, ie:
> 
> __attribute__((aligned(1)) struct { int x; } *p;
> if (((intptr_t)p & 3) == 0)
>    x = p->x;  // align 4
> else
>    y = p->x;  // align 1
> 
> It would be very wrong to change the alignment of the 2nd load to be 4-byte
> aligned.
True, but that's not what's going on here.

We're talking about two instructions where if the first executes, then
the second also executes.  If the memory addresses are the same, then
their alignment is the same.

In your case the two instructions are on different execution paths and
are in fact mutually exclusive.

jeff